ggml-org / ggml

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          "headline": "ggml : bump version to 0.17.0 (#1568)",
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          "body": "* vulkan: Support Q2_0\n\nThe backend perf tests for mat-vec-mul weren't very good at first (worse than\nq2_k), doubling the rows per workgroup made a big difference.\n\n* reorder\n\n* resolve merge conflict, adjust err threshold for f16->q2_0 set_rows",
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          "headline": "opencl: loads quants as uint for q4_K and q5_K flat mv (optimization …",
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          "is_bot": false,
          "headline": "DeepseekV4: Add fused hyper-connection ops (llama/25585)",
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          "body": "…ing) and more MUL_MAT updates (llama/25762)\n\n* hex-mm: fix artificial limit in the solver that restricted number of act-prep threads\n\n* hex-mm: fix warning\n\n* hex-prof: do not apply --top to the timeline report\n\n* hmx-mm: add suport for tiled act-processing to better distribute hvx work\n\n* hex-l2: \n[…]\ntx that must be zero anyway\n\n* hex-hmx: fix hmx_queue_depth to use idx_write - idx_read\n\n* hex-hmx: use atomic_load for idx_read/write\n\n* hex-main: add static assert to make sure n_threads are aligned",
          "is_bot": false,
          "headline": "hexagon: L2 cache handling rework (dirty bit tracking with lazy flush…",
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          "body": "The current integration treats SME as a single capability (CPU_FEATURE_SME)\nwith no distinction between SME(v1) and SME2. The kernels dispatched under\nCPU_FEATURE_SME use SME2-specific instructions, making dispatch incorrect\non SME(v1)-only hardware.\n\nWe introduce build-time and runtime distinction between SME and SME2, and\nwire SME(v1) and SME2 kernels based on actual hardware support.",
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          "headline": "kleidiai: Add SME vs SME2 distinction in kernel dispatch (llama/25478)",
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          "headline": "vulkan: when using transfer queue for async copies, sync on event_wai…",
          "author_name": "Ruben Ortlam",
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          "body": "* support cuda virtual devices\n\n* disable NCCL path when virtual devices are used\n\n* label virtual devices in description; add GPUx2 server CI jobs\n\n* code refactor",
          "is_bot": false,
          "headline": "CUDA: Support CUDA Virtual Devices (llama/25228)",
          "author_name": "Anav Prasad",
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          "headline": "Enable CUDA graphs on volta+turing (llama/25749)",
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          "oid": "4993434d5ef634b01904fba251331fb8eea5d5f7",
          "body": "PR #16308 set info.devices[id].integrated = false unconditionally for all\nCUDA/HIP devices as a workaround for corrupted output on Jetson Orin\n(#15034). On HIP/ROCm the device's real hipDeviceProp_t.integrated flag is\nneeded: with the cached field forced to false, supports_buft() refuses\nCUDA host b\n[…]\nto non-HIP (CUDA) builds and\nrestore prop.integrated for HIP, keeping the Jetson workaround intact for\nCUDA.\n\nFixes #23977\n\nSigned-off-by: liminfei-amd <91481003+liminfei-amd@users.noreply.github.com>",
          "is_bot": false,
          "headline": "ggml-cuda : restore prop.integrated on HIP builds (llama/24233)",
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          "oid": "58a052adc567e772e0393be5334c632df3a331f8",
          "body": "* CUDA: dedup MoE gate/up activation quantization (fp4)\n\nFor MoE gate/up projections the src1 activation is broadcast across the\nrouted experts (ne11 == 1), so ids_src1 maps every one of a token's\nn_expert_used slots to the same physical row. The MMQ path therefore\nre-quantized each token's activati\n[…]\ng review comments\n\n* Add pragma unrolls\n\n* Remove redundant cudaMemsetAsync call\n\n* Removing follow up redundancies\n\n---------\n\nCo-authored-by: praneshgo <227579474+praneshgo@users.noreply.github.com>",
          "is_bot": false,
          "headline": "CUDA: dedup MoE gate/up activation quantization (llama/25441)",
          "author_name": "Pranesh Gonegandla",
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          "body": "…ues for Adreno 850 GPU (llama/25745)\n\n* opencl: workaround for A850 compiler compat\n\n* opencl: fix DX compiler version parsing and cleanup\n\n---------\n\nCo-authored-by: Li He <lih@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "opencl: disable FA and MoE weights repack to work around compiler iss…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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          "headline": "cuda: extract Q1_0 elements via __byte_perm (llama/25628)",
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          "body": "* opencl: exclude Adreno A7x from using Adreno MoE kernels\n\nSome compilers for A7x devices miscompile the repack kernels, corrupting\nthe weights and causing MoE models to generate garbage output\n\n* opencl: exclude A6x and unknown Adreno from MoE weights repack",
          "is_bot": false,
          "headline": "opencl: exclude some moe kernels on Adreno a7x (llama/25698)",
          "author_name": "Hongqiang Wang",
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          "body": "…kernel + wmma kernel) (llama/25545)\n\n* cuda : CUDA GGML_OP_LIGHTNING_INDEXER implementation (generic vector kernel + wmma kernel)\n\n* chore : remove indentation of #pragma unroll\n\n* cuda : remove unnecessary kernel template declarations\n\n* cuda : add WARPS_PER_BLOCK and K_VECS_PER_BLOCK template par\n[…]\n rename, this time uppercased all constants\n\n* cuda : added alignment checks for Q and K tensors in lightning indexer implementation\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
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          "headline": "cuda : CUDA GGML_OP_LIGHTNING_INDEXER implementation (generic vector …",
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          "body": "* opencl: route `sub_group_shuffle_xor` to qcom ext when KHR ext is unavailable\n\nKHR `sub_group_shuffle_xor` is not defined by compiler when\n`cl_qcom_subgroup_shuffle` is present, causing certain FA\nkernels fail to build. Define the KHR shuffle_xor using\nthe qcom extension.\n\n* opencl: skip FA kernels with mixed and quant types for A7x to avoid compiler crash",
          "is_bot": false,
          "headline": "opencl: fix two issues on flash attention for Adreno a7x (llama/25697)",
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          "headline": "CUDA: tighter MMQ src1 buffer size for native fp4 (llama/25613)",
          "author_name": "leonardHONG",
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          "body": "…ma/25678)\n\n* cuda : relax tensor contiguity requirements for quantized concat\n\n* tests : add test cases for non-contiguous quantized concat\n\n* ggml : relax contiguity requirements for quantized concat\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
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          "body": "* metal: fuse snake activation (mul, sin, sqr, mul, add)\n\nMirror the CUDA, Vulkan and CPU snake fusion: same matcher on the naive\n5-op chain, same F32 contract on a and inv_b, same F32/F16/BF16 kernel\nwith F32 compute. Follows the Metal backend idioms: bf16 instantiation\ngated behind GGML_METAL_HAS_\n[…]\n, and dispatch the fused path from ggml_metal_op_bin.\nThe encode loop switch is back to a single call per case.\n\nAddress review from ggerganov\n\n* metal: fix indentation in ggml_metal_op_can_fuse_snake",
          "is_bot": false,
          "headline": "metal: fuse snake activation (mul, sin, sqr, mul, add) (llama/25459)",
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          "headline": "ggml: add f16 out_prod support for CPU and out_prod op for Vulkan (ll…",
          "author_name": "Michael Lamothe",
          "author_login": "Lamothe",
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          "headline": "sycl : fix get_rows Q2_K, Q4_K, Q5_K (llama/25656)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
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          "headline": "sycl : support kernel type fp16 for conv2d_dw (llama/25653)",
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          "headline": "sycl : implement xielu op (llama/25550)",
          "author_name": "Andrew Smith",
          "author_login": "atsmith3",
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          "body": "…25525)\n\nRaise the threshold for minimum buffer size from 1 GiB to 4 GiB, based\non real-world experiments of overcommitting device memory with model\nweights larger than available VRAM, for example Qwen3.5-35B-A3B-Q8\nrunning on a B70.\n\nAlso add a debug message to better track USM system allocations.\n\nSigned-off-by: Francois Dugast <francois.dugast@intel.com>",
          "is_bot": false,
          "headline": "sycl: Increase minimum buffer size for USM system allocations (llama/…",
          "author_name": "Francois Dugast",
          "author_login": "ifdu",
          "committed_at": "2026-07-17T11:40:04Z",
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          "body": "* [SYCL] F16 (default) Flash Attention with XMX engine via oneDNN graph API; Qwen3.6-27b-Q8_0 prefill speed up x1.21 at p=512 and x4.26 at p=80k\n\n* [SYCL] Address review on FA oneDNN path. Result: llama-bench---pp512; 32% increase with fa1; llama-perplexity---0.11% difference; tested model: mraderma\n[…]\n-------\n\nCo-authored-by: scientist3 <scientist.3@users.noreply.github.com>\nCo-authored-by: hmscider <hmscider@users.noreply.github.com>\nCo-authored-by: maxious <81432+maxious@users.noreply.github.com>",
          "is_bot": false,
          "headline": "Flash Attention with XMX engine via oneDNN (llama/25222)",
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          "author_login": "hmscider",
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          "body": "….x (llama/25673)",
          "is_bot": false,
          "headline": "opencl: do not use `clCreateBufferWithProperties` when targeting CL 2…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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          "body": "…25640)",
          "is_bot": false,
          "headline": "opencl: handle OOB write in noshuffle GEMV kernels (odd ne01) (llama/…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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          "oid": "d7749710636c286caacc6d8eb6ea28a350429a2e",
          "body": "…671)\n\nThe f16 GEMV kernels take a vectorized path for ne00 >= 128 that casts the row\npointers to half4 or float4. When the row stride is not aligned, the wide load\nbecomes misaligned. On devices that require natural alignment for vector loads,\nthe kernel reads garbage. This is the case Intel GPUs and the kernels produce\nincorrect results there. Adreno happpens to be byte addressable and the kernels\nhappen to work.",
          "is_bot": false,
          "headline": "opencl: avoid the vec path in GEMV for unaligned row stride (llama/25…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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        },
        {
          "oid": "86f41a97152fcf277be40f2b2d14e96de3032cc0",
          "body": null,
          "is_bot": false,
          "headline": "hexagon: fix hmx-queue signal enum-narrowing problem (llama/25677)",
          "author_name": "Chyan",
          "author_login": "chyan8",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
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        },
        {
          "oid": "116d05bb9536665ef94497897cb26cf8f8ec7380",
          "body": "…s unavailable (llama/25639)\n\n* opencl: do not fail backend init on devices without cl_khr_integer_dot_product\n\n* opencl: do not call dp4 kernels when dp is unavailable\n\n---------\n\nCo-authored-by: Li He <lih@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "opencl: fix a dp4a bug for devices where cl_khr_integer_dot_product i…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "22b713aa92aa620401840e89c1312e97f8077368",
          "body": "* vulkan/cpu: Support f16 as SET_ROWS src.\n\nThis adds full support for f16 SET_ROWS (equivalent to f32) to vulkan and CPU\nbackends, and adds more backend tests.\n\n* Set DenormPreserve 16 when supported, to try to fix failures on Intel\n\n* tune error threshold\n\n* update metal supports_op",
          "is_bot": false,
          "headline": "vulkan/cpu: Support f16 as SET_ROWS src. (llama/25432)",
          "author_name": "Jeff Bolz",
          "author_login": "jeffbolznv",
          "committed_at": "2026-07-17T11:40:04Z",
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        },
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          "oid": "aa4379fd3d3677af0a6dac4221d8158349795a01",
          "body": "… dimensions (llama/25650)\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
          "is_bot": false,
          "headline": "ggml : add a set of functions for checking contiguity of inner tensor…",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "efee796c5910a988b63eeb52ac6cf1b6d7abf719",
          "body": "* ggml: uniformize im2col dst_type for all conv ops\n\n* Update ggml/src/ggml.c\n\nCo-authored-by: Georgi Gerganov <ggerganov@gmail.com>\n\n* ggml : uniformize im2col casting logic across all conv ops\n\n* fix : allow im2col_f16 to accept any kernel type\n\n---------\n\nCo-authored-by: Georgi Gerganov <ggerganov@gmail.com>",
          "is_bot": false,
          "headline": "ggml: uniformize im2col dst_type for all conv ops (llama/23660)",
          "author_name": "JusteLeo",
          "author_login": "Juste-Leo2",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "ba1840e2d053126d499aa89ee2cd23e56bb7dd9e",
          "body": "* kleidiai : add SME2 f32 kernel\n\n* enable dynamic scheduling for SME2 f32 kernel",
          "is_bot": false,
          "headline": "kleidiai : add SME2 f32 kernel (llama/24414)",
          "author_name": "Charles Xu",
          "author_login": "chaxu01",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "f5aefb5d683f76f36695be587e1726aa08cc46d0",
          "body": "Currently detects lunarlake + battlemage / xe2 and\nsets the value to 256.\n\nKeeps default at 128, Intel's ARC Alchemist's prefered value.",
          "is_bot": false,
          "headline": "sycl: set fattn_vec_nthreads to 256 for Battlemage (llama/25205)",
          "author_name": "Titaniumtown",
          "author_login": "Titaniumtown",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "8165e8d3ddaab40d444fd011149135136b5c6517",
          "body": null,
          "is_bot": false,
          "headline": "metal : add Q2_0 support (llama/25419)",
          "author_name": "Pasha Khosravi",
          "author_login": "khosravipasha",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "3e7717a77477e0f193a9b6f1a813e747e8626697",
          "body": "* CUDA: refactor MMQ kernel configuration\n\n* fix Blackwell config\n\n* remove legacy code",
          "is_bot": false,
          "headline": "CUDA: refactor MMQ kernel configuration (llama/24127)",
          "author_name": "Johannes Gäßler",
          "author_login": "JohannesGaessler",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
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        },
        {
          "oid": "e13e9d84e4609c1633f8341c0190a76250c63bc6",
          "body": "…5338)\n\nThis uses the new VK_EXT_shader_ocp_microscaling_types extension to do fp4 type\npromotions, and also uses the float8 extension to do ue4m3 promotions for\nnvfp4. It's reasonable to assume that an implementation that supports fp4 will\nalso support fp8, so we don't need to handle all possible combinations of\nsupport.",
          "is_bot": false,
          "headline": "vulkan: Use native e2m1 and e4m3 conversions for mxfp4/nvfp4 (llama/2…",
          "author_name": "Jeff Bolz",
          "author_login": "jeffbolznv",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
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        },
        {
          "oid": "3f12eb18b2b6cb6fccb6f3982a35641f6fae0e47",
          "body": "* tests: Harmonize the use of private ggml includes\n\n* tests: In test-backend-ops, use quoted includes\n\nAs with all other tests. This is to ensure that the build uses shipped\nheaders over possibly system-installed ones.",
          "is_bot": false,
          "headline": "tests: Harmonize header use (llama/25616)",
          "author_name": "Christian Kastner",
          "author_login": "ckastner",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "499d4c61498085f3c63dfde438161bd20a09dff0",
          "body": "* gguf : add tensor shape accessors\n\n* gguf : return tensor shape as const int64_t *\n\n* gguf : remove n_dims accessor, keep only gguf_get_tensor_ne",
          "is_bot": false,
          "headline": "gguf : add tensor shape accessor (llama/24405)",
          "author_name": "QuintinShaw",
          "author_login": "QuintinShaw",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "0d93bb6d78197409293f4889c46f267f508ffaf5",
          "body": "* sycl: add fused top-k MoE\n\n* sycl: address review: GGML_SYCL_ENABLE_FUSION env, move fusion dispatch to topk-moe\n\n* sycl: print GGML_SYCL_ENABLE_FUSION at startup like other env vars\n\nCo-Authored-By: Claude Fable 5 <noreply@anthropic.com>\n\n---------\n\nCo-authored-by: Claude Fable 5 <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "sycl: add fused top-k MoE (llama/25217)",
          "author_name": "Frosty40",
          "author_login": "newjordan",
          "committed_at": "2026-07-17T11:40:04Z",
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          "is_coding_agent": true
        },
        {
          "oid": "19b4e0703664420ed1420c6d1d3ccb81d9fa1277",
          "body": "Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>",
          "is_bot": false,
          "headline": "sycl: add Q2_K to DMMV reorder path (llama/25064)",
          "author_name": "Todd Malsbary",
          "author_login": "malsbat",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
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        },
        {
          "oid": "64b078224978614d3551e583aadc6036ecad37ea",
          "body": null,
          "is_bot": false,
          "headline": "gguf : reject empty metadata keys (llama/24917)",
          "author_name": "Rohit Mahesh",
          "author_login": "rohitmahesh1",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
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        },
        {
          "oid": "4d554fc69fac1922a0e480a1d74697184d950d76",
          "body": "… (llama/25157)\n\nIf a Cuda device has no or limited available memory, the actual call\nto cudaMemGetInfo() itself can cause a fatal crash due to a cuda out\nof memory error (there is not enough memory to actually query memory)\n\nThis causes an issue because we query memory for all devices at\nstartup ev\n[…]\nam effect of the fit\nalgorithm not trying to put any layers on it, which is desired outcome\nvs hard crashing.\n\nthis also prevents crashes in cuda enabled builds when user explicitly\npasses '-dev none'",
          "is_bot": false,
          "headline": "cuda: Don't crash when querying memory on device with no free memory.…",
          "author_name": "cphlipot",
          "author_login": "cphlipot",
          "committed_at": "2026-07-17T11:40:04Z",
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        },
        {
          "oid": "13f4e9ff9047ec236cdc8c4f3ab2aaf547ad9c09",
          "body": "… lightning indexer (llama/24231)\n\n* ggml : add GGML_OP_LIGHTNING_INDEXER that implements DeepSeek V3.2/V4 lightning indexer\n\n* ggml : remove scale parameters from lightning indexer OP, add f16 mask parameter\n\n* tests : add GGML_OP_LIGHTNING_INDEXER tests\n\n* ggml : bump RPC version\n\n* chore : check \n[…]\ning indexer mask broadcasting\n\n* chore : whitespace\n\n* llama : use GGML_OP_LIGHTNING_INDEXER in DeepSeek V3.2 and DeepSeek V4 models\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
          "is_bot": false,
          "headline": "ggml : add GGML_OP_LIGHTNING_INDEXER that implements DeepSeek V3.2/V4…",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
          "committed_at": "2026-07-17T11:40:04Z",
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          "is_coding_agent": false
        },
        {
          "oid": "d14d9db8ca4b2f2d9ab83cf5be4f17e519f2283c",
          "body": "* [Vulkan] Fixes llama-cli breaking over longer promts sizes\n\nThe llama-cli was breaking for longer promts sizes for q4_0 quantized networks. Causing due to insufficient shared memory.\n\n* Removed the un-used Adreno device\n\n* Updated matmul for small pipeline.",
          "is_bot": false,
          "headline": "Vulkan: route large matmuls to medium tile on Adreno (llama/24877)",
          "author_name": "Raman Shinde",
          "author_login": "Raman-Raje",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "a4499c36bc30a5ef53c28764e6e5af6544c00120",
          "body": "…Us (llama/25537)\n\n* opencl: add int8 dp4 dense and moe GEMM\n\n* opencl: refactor\n\n---------\n\nCo-authored-by: Li He <lih@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "opencl: add int8 dp4 dense and MoE prefill optimization for Adreno GP…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "9d49fcb2aed564c69d6e1cd6b6b7423263c04b36",
          "body": "* hex-sort: add efficient bitomic sort in hvx regs up to 1024 elements\n\n* hex-sort: fix inverted vrors\n\n* hex-sort: specialize sort functions for the common cases\n\n* hex-sort: add tracing and local context",
          "is_bot": false,
          "headline": "hexagon: improve ARGSORT performance for small tensors (llama/25512)",
          "author_name": "Max Krasnyansky",
          "author_login": "max-krasnyansky",
          "committed_at": "2026-07-17T11:40:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "af97976c7810cdabb1863172f31c432dab767de7",
          "body": null,
          "is_bot": false,
          "headline": "sync : llama.cpp",
          "author_name": "Georgi Gerganov",
          "author_login": "ggerganov",
          "committed_at": "2026-07-10T11:05:01Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "f731440cee59446db5befdc5288298459e808f2e",
          "body": "* ggml-et: Add performance logging\n\n* ggml-et: Quants helpers\n\n* ggml-et: Add MUL_MAT kernel\n\n* ggml-et: Add ROPE kernel\n\n* ggml-et: Add RMS_NORM kernel\n\n* ggml-et: Add GLU kernel\n\n* ggml-et: Add SOFT_MAX kernel\n\n* ggml-et: Add GET_ROWS kernel\n\n* ggml-et: Add CONT kernel\n\n* ggml-et: Add SET_ROWS ker\n[…]\nGianluca Guida <gianluca@nekko.ai>\nCo-authored-by: ubergarm <leimgrub@gmail.com>\nCo-authored-by: SaqibAkram-10xE <saqib.akram@10xengineers.ai>\nCo-authored-by: Rehan Qasim <rehan.qasim@10xengineers.ai>",
          "is_bot": false,
          "headline": "ggml-et: Initial ET backend (llama/24179)",
          "author_name": "Martin Chang",
          "author_login": "marty1885",
          "committed_at": "2026-07-10T11:05:01Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "54f2c8e9396a3f57093d4047036ce8a5ed5ad3f8",
          "body": null,
          "is_bot": false,
          "headline": "opencl: cluster-parallel decode FA for Adreno (llama/25473)",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
          "committed_at": "2026-07-10T11:05:01Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "f5b88f17d4d9c969861587944956738af279e48e",
          "body": "…rgsort() to reduce temporary buffers memory usage (llama/24776)\n\n* ggml : process data in smaller chunks in CUDA ggml_top_k() implementation to reduce temporary buffers memory usage\n\n* ggml : allocate tmp_dst only only once before the loop\n\n* chore : whitespaces\n\nCo-authored-by: Georgi Gerganov <gg\n[…]\nnary operators with min/max\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>\nCo-authored-by: Georgi Gerganov <ggerganov@gmail.com>\nCo-authored-by: Johannes Gäßler <johannesg@5d6.de>",
          "is_bot": false,
          "headline": "ggml : process data in smaller chunks in CUDA ggml_top_k() and ggml_a…",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
          "committed_at": "2026-07-10T11:05:01Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "0558cb9156d408caa461185f72e961aa998169a0",
          "body": "* hexagon: tile wide rows in pointwise unary ops to avoid VTCM overflow\n\n* unary: reject permuted tensors for now (not used by models)\n\n* hex-unary: replace divs with fastdiv\n\n* hex-unary: add vtcm layout and host computed kernel params\n\n* hex-unary: move fastdiv init into kernel params\n\n* hex-unary\n[…]\namline and remove more duplication\n\n* ggml-hexagon: fix std::min collision with Windows min macro\n\n* hex-cmake: make lto build happy\n\n---------\n\nCo-authored-by: Max Krasnyansky <maxk@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "hexagon: tiling, tracing and optimizations for unary ops (llama/25474)",
          "author_name": "Aparna M P",
          "author_login": "aparmp-quic",
          "committed_at": "2026-07-10T11:05:01Z",
          "body_truncated": true,
          "is_coding_agent": false
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          "author_name": "Georgi Gerganov",
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          "body": "…a/25440)\n\n* Use smart pointers in test_case::eval\n\nThis makes it consistent with other methods of `test_case`.\n\n* Use smart pointer in show_test_coverage also\n\n* Also use smart pointers for backends",
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          "headline": "Refactor: Consistently use smart pointers in `test-backend-ops` (llam…",
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          "body": "The first one avoids relying on compile to optimize local memory away,\nand the second is cheaper than issuing control flow statements",
          "is_bot": false,
          "headline": "Only index by compile times + always multiply/add (llama/25445)",
          "author_name": "Oliver Simons",
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          "oid": "a1329a7aea74265c822a1ada449137fba75052b1",
          "body": "* metal : add CONV_2D_DW (depthwise 2D convolution) support\n\n* test : add perf cases for CONV_2D_DW\n\n* metal : use 3D dispatch for CONV_2D_DW kernel\n\n* metal : add channel-tiled CONV_2D_DW kernel for non-contiguous layouts\n\n* metal : simplify CONV_2D_DW dispatch and trim comments\n\n* metal : merge du\n[…]\n* tests : add F16 CONV2D_DW tests\n\n* cpu : fix F16 kernel support for CONV_2D_DW\n\n* tests : remove commented-out CONV_2D_DW test block\n\n---------\n\nCo-authored-by: Georgi Gerganov <ggerganov@gmail.com>",
          "is_bot": false,
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          "body": "CUDA is compiled with fast math and AMD/HIP is not — this flag lets AMD use fast math too.\n\nWe can't use -ffast-math: it implies -ffinite-math-only, which won't compile (ggml uses INFINITY for masking) and produces NaNs. -funsafe-math-optimizations gives the speedup without the NaN problems.\n\nCo-authored-by: Mark Caldwell <mark@cloudhands.ai>",
          "is_bot": false,
          "headline": "ggml-hip: enable -funsafe-math-optimizations (llama/24668)",
          "author_name": "RapidMark",
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          "oid": "0c580f65a116e02a5fcd86cf549556c234f63c67",
          "body": "* cuda: fix snake fusion type predicate, a and inv_b are F32\n\nThe matcher required a->type == x->type while launch_snake reads both\nas const float *, matching the CPU and Metal contract where a and inv_b\nstay F32. F16/BF16 chains never fused and fell back to the naive path,\nand a hypothetical all F1\n[…]\nads x[idx] and a[c] / inv_b[c] linearly, so a\nnon-contiguous view passing the matcher would silently read wrong data.\nMirror the contiguity guard already present in the CPU, Vulkan and\nMetal matchers.",
          "is_bot": false,
          "headline": "cuda: align snake fusion matcher with the other backends (llama/25460)",
          "author_name": "Pascal",
          "author_login": "ServeurpersoCom",
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          "body": "* hexagon: add VISION RoPE support\n\n* hexagon: support RoPE on strided half-dim views for all modes\n\n* hex-rope: decouple src0 DMA copy size from row stride\n\n* hex-rope: support non-contiguous dst for RoPE\n\n* hex-rope: fix dst spad pitch for non-contiguous dst",
          "is_bot": false,
          "headline": "hexagon: add VISION RoPE support (llama/25216)",
          "author_name": "Aparna M P",
          "author_login": "aparmp-quic",
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          "headline": "ggml-webgpu: tune subgroup split (d_split) in flash_attn_vec (llama/2…",
          "author_name": "Masashi Yoshimura",
          "author_login": "yomaytk",
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        {
          "oid": "0cb347e72d78e1bf6ead7ab1354123d0286a9e38",
          "body": "… of 128. (llama/25464)\n\n* opencl: fix garbled output for Q6_K weights with ne01 % 128 != 0 on Adreno\n\nObserved with granite-3.1-3b-a800m-instruct, whose vocab is an odd number.\n\nRoute Q6_K dense mul_mat with ne01 % 128 != 0 off the noshuffle path:\ndecode (ne1==1) uses the correct flat GEMV and the \n[…]\nosts at most 512 bytes per quantized tensor at the\nobserved 128-byte alignment.\n\n* opencl: use lm based q6_k mm when ne1 is not multiple of 128\n\n---------\n\nCo-authored-by: Li He <lih@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "opencl: Q6_K GEMM/GEMV fix for ne01 of weights that are not multiples…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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          "oid": "b7be0ca56ef48786cc782f71cc23f3de777f5138",
          "body": "* vulkan: disable FA mask_opt on GCN to improve performance\n\n* reenable mask opt over attention head size 256",
          "is_bot": false,
          "headline": "vulkan: disable FA mask_opt on GCN to improve performance (llama/24362)",
          "author_name": "Ruben Ortlam",
          "author_login": "0cc4m",
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          "body": "…xpert tiles) (llama/25433)\n\n* opencl: ragged-tile MoE prefill GEMM (skip padded expert tiles)\n\nThe MoE prefill GEMM groups tokens into TILESIZE_N=32 per-expert tiles; at low\ntokens-per-expert most tiles are mostly padding. When a tile's upper 16 slots\nare all padding (router index 0xFFFFFFFF), skip\n[…]\nskipped path. New env GGML_OPENCL_MOE_RAGGED_GRAN={8,16,32} (quarter/half/\noff); default quarter.\n\n* opencl: move ragged moe env var in cl_init\n\n---------\n\nCo-authored-by: Li He <lih@qti.qualcomm.com>",
          "is_bot": false,
          "headline": "opencl: ragged-tile MoE prefill FP16 GEMM optimization (skip padded e…",
          "author_name": "Hongqiang Wang",
          "author_login": "wanghqc",
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          "body": "…ount (llama/25240)",
          "is_bot": false,
          "headline": "vulkan: for small AMD GPUs, reduce submission threshold based on CU c…",
          "author_name": "Ruben Ortlam",
          "author_login": "0cc4m",
          "committed_at": "2026-07-09T20:39:29Z",
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        },
        {
          "oid": "f74b4ec9438003674f7167d5cf801f7c1fddbd24",
          "body": "…_ID and FLASH_ATTN_EXT (llama/25425)\n\n* hex-fa: refactor kernel param compute to use common layout builder\n\n* hmx: add explicit compiler barriers to make hmx funcs more robust\n\n* hex-vtcm: more generic vtcm layout builder for mm and flash-attn kernels\n\n* hex-hmx: unroll inner kernels\n\n* hex-hmx: us\n[…]\nueue wakeup and make suspend async to avoid hmx-lock latency\n\n* hex-hmx: move queue wakeup / suspend to the op-batch level\n\n* hex-threads: add hybrid polling to workpool\n\n* hex-mm: fix trailing spaces",
          "is_bot": false,
          "headline": "hexagon: new vtcm layouts and improved pipelines for MUL_MAT, MUL_MAT…",
          "author_name": "Max Krasnyansky",
          "author_login": "max-krasnyansky",
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          "headline": "cuda : add support for f16->f16 GGML_OP_SET_ROWS (llama/25367)",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
          "committed_at": "2026-07-09T20:39:29Z",
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        {
          "oid": "20f8dce7644ccb8ff9bdf046f8192a5b0cb708a9",
          "body": "Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>",
          "is_bot": false,
          "headline": "metal : add set_rows with src0 f16 (llama/25434)",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
          "committed_at": "2026-07-09T20:39:29Z",
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        },
        {
          "oid": "b821278cd760c67cb14e870163375c99d21f31d1",
          "body": "`simd_gemm()` has an incorrect A-matrix index in the scalar tail-column path for full row blocks.",
          "is_bot": false,
          "headline": "ggml : fix A indexing in simd_gemm scalar tail-column path (llama/25390)",
          "author_name": "tyronecai",
          "author_login": "tyronecai",
          "committed_at": "2026-07-09T20:39:29Z",
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        {
          "oid": "6e945e87fc8804399cf9b99b1e6017a835792070",
          "body": "* ggml : add support for CPU f16->f16 GGML_OP_SET_ROWS\n\n* ggml : add missing type checks in f16 GGML_OP_SET_ROWS\n\n* ggml : merge ggml_compute_forward_set_rows_f32() and ggml_compute_forward_set_rows_f16() into ggml_compute_forward_set_rows_impl()\n\n* chore : replace assert() with GGML_ASSERT()\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
          "is_bot": false,
          "headline": "ggml : add support for CPU f16->f16 GGML_OP_SET_ROWS (llama/25344)",
          "author_name": "fairydreaming",
          "author_login": "fairydreaming",
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          "oid": "417c6a391134dcba28c6777fde852a4d98da6356",
          "body": null,
          "is_bot": false,
          "headline": "opencl: fix potential crash in aos reconstruct (llama/25383)",
          "author_name": "lhez",
          "author_login": "lhez",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
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          "oid": "fcfe63891c0fe2e3e6d16a66bd22ff009f8f7b37",
          "body": null,
          "is_bot": false,
          "headline": "Add Q2_0 quantization: type definition and CPU backend (llama/24448)",
          "author_name": "Pasha Khosravi",
          "author_login": "khosravipasha",
          "committed_at": "2026-07-09T20:39:29Z",
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        },
        {
          "oid": "d23d698132212e2142e9d6e0c471052233330cc7",
          "body": "* CUDA: Fuse MMVQ for NVFP4 and BS 1\n\nTODO:\n1. Add tests to test-backend-ops (did verify correctness manually for\n   one model)\n2. Reorder bias/scale once PRs for NVFP4 are merged/landed\n\n* Add dense MMVQ fusion as well\n\nPerf numbers on B4500. Note qwen35 is FP8->Q8\n+ ./scripts/compare-llama-bench.p\n[…]\nly suggestions from code review\n\nCo-authored-by: Johannes Gäßler <johannesg@5d6.de>\n\n---------\n\nCo-authored-by: Georgi Gerganov <ggerganov@gmail.com>\nCo-authored-by: Johannes Gäßler <johannesg@5d6.de>",
          "is_bot": false,
          "headline": "CUDA: Fuse MMVQ post-scale for NVFP4 (llama/24481)",
          "author_name": "Oliver Simons",
          "author_login": "ORippler",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": true,
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        },
        {
          "oid": "917c9962d03dd629c92526b71c50ed631d1dd56e",
          "body": "-ffast-math implies -ffinite-math-only under ROCm/clang 22, which\ndisables INFINITY/NaN and triggers -Wnan-infinity-disabled (errors\nunder -Werror in CI). Re-enable infinity handling without dropping\nthe rest of fast-math.\n\nFixes #25361",
          "is_bot": false,
          "headline": "ggml-hip : add -fno-finite-math-only alongside -ffast-math (llama/25373)",
          "author_name": "asf0",
          "author_login": "asf0",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "d64fe439c43642ab948603734b609ccc8ae41519",
          "body": "* fix unsupported UT cases of CONT & CPY\n\n* update ops.md\n\n* rm unused head file",
          "is_bot": false,
          "headline": "fix unsupported UT cases of CONT & CPY (llama/25231)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
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        },
        {
          "oid": "24f8510f410bf5fa8b242aeef7c6143c167b7c86",
          "body": "* support op col2im_1d\n\n* update ops.md\n\n* rm unused words\n\n* update for bf16\n\n* optimize 1%-11% as the review comments\n\n* fix the format issue\n\n* update as the review comments",
          "is_bot": false,
          "headline": "support op col2im_1d (llama/25264)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "5f9daf53aa18c72d5bfcfef28bf45646b3185665",
          "body": "* support OP cross_entropy_loss, cross_entropy_loss_back\n\n* correct format issue",
          "is_bot": false,
          "headline": "support OP cross_entropy_loss, cross_entropy_loss_back (llama/25236)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "b4b14560ff05aa3514e6a2124ea3ef9b693cf4ee",
          "body": "* sycl: add supported types to ggml_sycl_supports_reorder_dmmv\n\nThe reordered feature is implemented in ggml_sycl_op_dequantize_mul_mat_vec,\nbut gated by ggml_sycl_supports_reorder_dmmv. This commit fixes the gate.\n\nSigned-off-by: Todd Malsbary <todd.malsbary@intel.com>\n\n* sycl: set K_QUANTS_PER_ITE\n[…]\n, the extra field is not allocated and the reorder path\nwill not take effect.\n\nSigned-off-by: Todd Malsbary <todd.malsbary@intel.com>\n\n---------\n\nSigned-off-by: Todd Malsbary <todd.malsbary@intel.com>",
          "is_bot": false,
          "headline": "sycl : set K_QUANTS_PER_ITERATION to 1 on DMMV path (llama/25063)",
          "author_name": "Todd Malsbary",
          "author_login": "malsbat",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "3ca69207c1c0f296220fbdffcbc85e9e358e2f13",
          "body": "* fix unsupport ACC UT cases for noncontiguous\n\n* update ops.md",
          "is_bot": false,
          "headline": "fix unsupport ACC UT cases for noncontiguous (llama/25124)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
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        },
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          "oid": "67bd31342618162de82ff446982937ba8b31ef79",
          "body": null,
          "is_bot": false,
          "headline": "sycl : enhance argsort to support all UT cases (llama/25125)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
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        },
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          "oid": "d7cab79d8b5ff12b7d1d84adc35e8873e993ccf7",
          "body": null,
          "is_bot": false,
          "headline": "sycl : use sycl func to fix AOT double type issue (llama/25081)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
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        },
        {
          "oid": "7838c96fcc874887fbe78c2f2ff236abce1f1683",
          "body": null,
          "is_bot": false,
          "headline": "sycl : rename the env vars from \"disable\" to \"enable\" (llama/25042)",
          "author_name": "Neo Zhang",
          "author_login": "arthw",
          "committed_at": "2026-07-09T20:39:29Z",
          "body_truncated": false,
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        },
        {
          "oid": "540b9f09000e3754c37ba2f1fd1d72ad9ecfe4f9",
          "body": null,
          "is_bot": false,
          "headline": "ggml : make ggml_time_init idempotent (llama/24422)",
          "author_name": "An Long",
          "author_login": "aisk",
          "committed_at": "2026-07-09T20:39:29Z",
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        },
        {
          "oid": "764cc69ca6679c325f95988c59b40579687ebb18",
          "body": "… unimplemented f16 support (llama/25351)\n\n* vulkan : check src0 type in GGML_OP_SET_ROWS to avoid failures due to unimplemented f16 support\n\n* chore : get rid of else\n\n---------\n\nCo-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>",
          "is_bot": false,
          "headline": "vulkan : check src0 type in GGML_OP_SET_ROWS to avoid failures due to…",
          "author_name": "fairydreaming",
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        "weight": 0.2,
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              },
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                "points": 0,
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              },
              {
                "key": "editorconfig",
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              },
              {
                "key": "openssf_scorecard_ci_tests",
                "name": "OpenSSF Scorecard: CI-Tests",
                "detail": "OpenSSF Scorecard unavailable",
                "points": 0,
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          },
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                "machine-learning",
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              },
              {
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              },
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                "key": "documentation_homepage_site",
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                "points": 0,
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                "max_points": 15
              },
              {
                "key": "repository_description",
                "name": "Repository description",
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                "points": 10,
                "status": "met",
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              },
              {
                "key": "topics",
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                "status": "met",
                "details": [
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              {
                "key": "wiki",
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                "status": "met",
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                "max_points": 10
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            ]
          }
        ],
        "description": "Are baseline engineering and documentation practices in place?"
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      {
        "key": "security",
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        "name": "Security",
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        "weight": 0.16,
        "metrics": [
          {
            "key": "security_posture",
            "band": "critical",
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            "note": null,
            "notes": [],
            "value": 1,
            "inputs": {
              "source": "file_signals",
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              "has_codeql_workflow": false,
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            "components": [
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                "key": "security_policy_security_md",
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                "points": 0,
                "status": "missed",
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                "max_points": 30
              },
              {
                "key": "dependabot_config",
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                "points": 0,
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              },
              {
                "key": "dependency_lockfiles",
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              {
                "key": "codeql_workflow",
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            ]
          },
          {
            "key": "dependency_advisories",
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              },
              {
                "code": "weights_renormalized",
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              {
                "code": "advisories_scope_repository",
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              {
                "code": "advisories_unassessed",
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              },
              {
                "code": "advisories_repo_graph_caveat",
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              {
                "code": "advisories_reachability",
                "params": {}
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            ],
            "value": 100,
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              "assessed_packages": 4,
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              "affected_by_severity": "critical 1",
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            },
            "components": [
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                "key": "direct_dependencies_free_of_known_advisories",
                "name": "Direct dependencies free of known advisories",
                "detail": "no direct dependency carries a known advisory",
                "points": 35,
                "status": "met",
                "details": [
                  {
                    "code": "no_direct_advisories",
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                ],
                "max_points": 35
              },
              {
                "key": "indirect_dependencies_free_of_known_advisories",
                "name": "Indirect dependencies free of known advisories",
                "detail": "transitive set not separable from development and test dependencies in this scope",
                "points": 0,
                "status": "excluded",
                "details": [
                  {
                    "code": "advisories_scope_not_separable",
                    "params": {}
                  }
                ],
                "max_points": 25
              },
              {
                "key": "no_advisories_left_outstanding",
                "name": "No advisories left outstanding",
                "detail": "no advisory carries a publication date",
                "points": 0,
                "status": "excluded",
                "details": [
                  {
                    "code": "advisories_no_publication_date",
                    "params": {}
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                ],
                "max_points": 40
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            ]
          },
          {
            "key": "malicious_dependencies",
            "band": "excellent",
            "name": "Malicious dependencies",
            "note": null,
            "notes": [],
            "value": 100,
            "inputs": {
              "source": "osv",
              "meaning": "reported as a malicious package by the OpenSSF corpus; the remedy is removal or moving off the compromised name, never an upgrade of the same artifact. Versions the registry has since pulled are listed but not scored",
              "packages": [],
              "red_flag": false,
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              "direct_malicious_packages": 0,
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              "installable_malicious_packages": 0
            },
            "components": [
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                "key": "no_dependency_reported_as_a_malicious_package",
                "name": "No dependency reported as a malicious package",
                "detail": "no dependency is reported as a malicious package",
                "points": 100,
                "status": "met",
                "details": [
                  {
                    "code": "no_malicious_dependencies",
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                  }
                ],
                "max_points": 100
              }
            ]
          },
          {
            "key": "high_risk_jurisdiction_exposure",
            "band": "excellent",
            "name": "High-Risk Jurisdiction Exposure",
            "note": "Only high-confidence self-published location evidence affects this multiplier. Ambiguous matches are review-only; country evidence is not proof of nationality, citizenship, legal registration, malicious intent, or sanctions status.",
            "notes": [
              {
                "code": "jurisdiction_evidence_limits",
                "params": {}
              }
            ],
            "value": 100,
            "inputs": {
              "meaning": "self-published location evidence; not nationality or citizenship",
              "red_flag": false,
              "exposures": [],
              "policy_countries": [
                "Russia",
                "Iran",
                "North Korea"
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              "review_only_matches": 0,
              "assessed_self_published_locations": 8
            },
            "components": [
              {
                "key": "policy_exposure_multiplier",
                "name": "Policy exposure multiplier",
                "detail": "no confirmed policy-scope location match",
                "points": 100,
                "status": "met",
                "details": [
                  {
                    "code": "jurisdiction_no_match",
                    "params": {}
                  }
                ],
                "max_points": 100
              }
            ]
          }
        ],
        "description": "Are visible security and supply-chain practices strong, with no malicious dependency and no unresolved high-risk jurisdiction exposure?"
      },
      {
        "key": "ai_readiness",
        "band": "at_risk",
        "name": "AI Readiness",
        "value": 48,
        "weight": 0,
        "metrics": [
          {
            "key": "ai_agent_context",
            "band": "at_risk",
            "name": "Agent context & guidance",
            "note": null,
            "notes": [],
            "value": 40,
            "inputs": {
              "has_llms_txt": false,
              "legible_history_share": 0.76,
              "agent_instruction_files": [],
              "agent_instruction_max_bytes": null
            },
            "components": [
              {
                "key": "agent_instructions",
                "name": "Agent instructions",
                "detail": "no CLAUDE.md / AGENTS.md / editor rules",
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