iree-org / wave

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          "oid": "ceaa2b571b7d4ad10c45978e8adf5c720466e007",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260409...iree-3.12.0rc20260410\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: \n[…]\n898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>\nCo-authored-by: Gaurav Verma <48321602+xintin@users.noreply.github.com>",
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          "headline": "Bump IREE requirement pins to their latest versions. (#1289)",
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          "body": "The core things added are split-k gemm, and it is tested for (1)\ngeneration of the `buffer_atomic_pk_add_bf16` instruction that we wanted\nto use, and (2) for gemm correctness.\n\nOverview of changes unrelated to wave_asm:\n\n- `remove_global_indexing` in `general_utils.py`: Zeroes out tiling\nconstraint \n[…]\n overshoot, avoiding the\nspurious bound. (This was necessary to get scale_preshuffle to have 4x\nvector loads when combined with split-k.)\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Implement mxfp4 split-k gemm (#958)",
          "author_name": "William G Hatch",
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          "body": "This PR:\n- Optimizes MXFP 8w schedule with respect to counters and memory ops.\n\n- Includes a handwritten MLIR snippet that performs swizzle and dword\nstores to global memory (instead of u shorts). This optmization brings\napprox 7% improprement.\n\n- Unrolls the kernel twice to remove forced vmcnt(0) +\n[…]\nociated with gather_to_lds operations. This avoids inserting costly\nmasking logic in the dynamic case and improves performance.\n\n\n---------\n\nSigned-off-by: Aurore De Spirlet <aurore.despirlet@amd.com>",
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          "headline": "MXFP4 8w Optimizations Dynamic (#1211)",
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          "body": "…1292)\n\nAdd interactive IR editing via PassInstrumentation. After (or before) a specified pass, the current IR is written to a temporary file and compilation blocks until the user presses Enter, allowing manual edits to the IR mid-pipeline.\n\n- `--mlir-edit-ir-after=<pass>` / `--mlir-edit-ir-before=<\n[…]\naveCompileOptions` extended with matching fields\n- Lit test covering selective firing, all-pass variants, and IR\nround-trip\n\nFixes #1291\n\n---------\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
          "is_bot": false,
          "headline": "[water] Add --mlir-edit-ir-{before,after,all} pass instrumentation (#…",
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          "body": "As mentioned in PR comments from\nhttps://github.com/iree-org/wave/pull/1266 using `uv` is nice for\ndevelopment generally, so let's just standardize on it in the setup\ninstructions.\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "suggest uv instead of normal pip in docs (#1276)",
          "author_name": "William G Hatch",
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          "body": "Use module-level alias for index mappings to decrease their verbosity in\nthe overall IR: only the alias name is printed at use sites and\nidentical mappings have the same alias. This is similar to affine maps.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
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          "headline": "[water] module-level alias for WaveIndexMappingAttr (#1287)",
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          "body": "…ison (#1228)\n\nTeach the MLIR-to-FX importer to handle ops used by the MXFP4 GEMM\nkernel and fix the roundtrip comparison for MMA index expressions.\n\nFX emitter:\n- Add `_handle_mma_like_op` handling both `wave.mma` and\n`wave.scaled_mma`\n- Add `_handle_bitcast_op` for `wave.bitcast`.\n- Add derived di\n[…]\nations and lost during MLIR serialization.\n- Add WaveConstraint comparator and thread `subs` into\n`assert_traces_equivalent`\n\nFixes #920\n\n---------\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
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          "headline": "[wave2water] Add MXFP4 support to fx_emitter and fix roundtrip compar…",
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          "body": "## Wide epilogue stores for bf16 MXFP4 GEMM via `v_permlane16_swap`\n\nIn MXFP4 GEMM kernels with bf16 output, the MMA accumulator layout\n(`F32_16x16x128_F8F6F4`) distributes results across threads in a\nnon-contiguous pattern each thread holds 4 values spanning 4 rows but\nonly 1 column. Without optimi\n[…]\n60) | 2936.09 | 3352.67 | 1.142x |\n| (14848, 12672, 10496) | 2781.61 | 3254.58 | 1.170x |\n| (1792, 19968, 60928) | 3115.72 | 3392.02 | 1.089x |\n\n---------\n\nSigned-off-by: xintin <gaurav.verma@amd.com>",
          "is_bot": false,
          "headline": "Add wide_stores support for MXFP4 (4wave) GEMM (llvm backend) (#1282)",
          "author_name": "Gaurav Verma",
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          "body": "This was a clutch introduced to correct for upstream DictionaryAttr not\npreserving the original order of keys when used for index expressions.\nWith WaveSymbolMappingAttr in place, this is no longer necessary and the\ninformation contained in `ordered_syms` is just duplicating what is\navailable in the index expression.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\nAssisted-by: GPT 5.3 Codex / Cursor\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] remove ordered_syms, NFC (#1284)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
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          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260408...iree-3.12.0rc20260409\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>",
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          "headline": "Bump IREE requirement pins to their latest versions. (#1285)",
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          "oid": "5f6d8bef627466a94843b8db0ba1d5a8dfb66e13",
          "body": "Hyperparameters are indexed by symbol names so using a dedicated\ncontainer removes the need to go through opaque attributes or strings.\n\nNote that the definition of the hyperparameter attribute had to be moved\nso it can access the definition of the mapping attribute.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] use WaveSymbolMappingAttr for hyperparams (#1279)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
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          "oid": "0ca0dbf5cdd78568e71362750bafa9fa44772309",
          "body": "Replace the two parallel ArrayRef parameters (keys/values) with a single\nArrayRef<pair<WaveSymbolAttr, Attribute>> parameter, making the\nattribute directly iterable via range-for. Update all use sites\naccordingly:\n\n- Replace getKeys()/getValues() accessors with structured bindings over\ngetMapping() \n[…]\nhe C API and Python bindings\n\n---------\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>\nCo-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>\nCo-authored-by: Oleksandr \"Alex\" Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] Refactor WaveSymbolMappingAttr to pair-based storage (#1275)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-04-09T08:43:18Z",
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          "oid": "6a8d9bbcf488522ec3e7ed0bea37f7467ea5624f",
          "body": "LINEAR_INDEX global reads previously forced maskedload\n(linear_buffer_ops = False) to ensure numerics match between IREE and\nwave runtime. However, maskedload on AMD hardware can fault on OOB\naddresses even with an all-false mask, because the hardware may touch\nthe address before checking the mask.\n\n[…]\nes and linearized reads interact\nwith epilogue elimination. So we add one so that we won't accidentally\nbreak epilogue elimination again.\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "reconcile linearization and epilogue elimination (#1278)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-04-09T05:05:49Z",
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          "oid": "7e5c23744616708f559a19a7e9bdc05325c82d91",
          "body": "This PR moves the scheduling passes to the end of the compilation\npipeline, after all optimization and analysis passes. This lets the\nschedule reason about the final optimized graph : merged reads,\nsimplified indices, computed bounds ,... rather than the intermediate\nstate that existed before.\n\nMovi\n[…]\nory. Fix in update_index_for_unroll() to substitute in dict\nkeys, not just values. And Unroll() to handle bounds expressions too\n\n---------\n\nSigned-off-by: Aurore De Spirlet <aurore.despirlet@amd.com>",
          "is_bot": false,
          "headline": "Move scheduling passes to the end of the pipeline (#1191)",
          "author_name": "Aurore De Spirlet",
          "author_login": "adedespirlet",
          "committed_at": "2026-04-09T01:36:17Z",
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          "oid": "dfa45bb3e1a5719ac9c1fd27c40e76e6c2ed8a45",
          "body": "This PR adds support for dynamic strides through the waveasm backend.\n\n# 4 Cases for Dynamic Strides\nThere are 4 main cases that needed to be addressed to ensure complete\nsupport.\n\n## Case 1: waveasm + dynamic strides\n\nThe loads were already using correct static offsets. The only issue was\n`num_reco\n[…]\n 1 fix (computeBufferSizeFromMemRef)\n```\n\n---------\n\nSigned-off-by: Surya Jasper <45545431+suryajasper@users.noreply.github.com>\nCo-authored-by: Gaurav Verma <48321602+xintin@users.noreply.github.com>",
          "is_bot": false,
          "headline": "Dynamic stride support through waveasm (#1091)",
          "author_name": "Surya Jasper",
          "author_login": "suryajasper",
          "committed_at": "2026-04-08T16:17:50Z",
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          "oid": "5e242938a29a062b7c99ebf5913279fc37a51d38",
          "body": "The pinned IREE compiler (3.12.0rc20260407) renamed this flag. Update\nthe two call sites to match.\n\nMade-with: Cursor\n\nSigned-off-by: Aurore De Spirlet <aurore.despirlet@amd.com>",
          "is_bot": false,
          "headline": "Rename --iree-rocm-target to --iree-hip-target (#1277)",
          "author_name": "Aurore De Spirlet",
          "author_login": "adedespirlet",
          "committed_at": "2026-04-08T16:08:01Z",
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          "oid": "ce49b1b8ca6642b038de2c7782c28ed7594a9c3e",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260407...iree-3.12.0rc20260408\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\n---------\n\nSign\n[…]\n Gymnich <tim@gymni.ch>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>\nCo-authored-by: Tim Gymnich <tim@gymni.ch>\nCo-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1280)",
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          "author_login": "iree-pr-automator[bot]",
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          "oid": "f559e539a9158d22d9657350d9a8e2a496e16842",
          "body": "- Replace identity lambda in applyConstraint with llvm::to_vector\n- Pass getLatticeValue directly instead of wrapping in a lambda\n\nCo-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>",
          "is_bot": false,
          "headline": "[water] Simplify map_to_vector lambda expressions in IndexExpr (#1281)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-04-08T14:36:32Z",
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          "oid": "ee87b748ded34c5d6ae48984f80f2547be693a13",
          "body": "Signed-off-by: Tim Gymnich <tim@gymni.ch>",
          "is_bot": false,
          "headline": "bump llvm to 6d3d88f74c405db660a20103905787fc67087287 (#1272)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-04-08T12:12:28Z",
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        {
          "oid": "1ce3ad8e6e681c31e2761b7eb4a5e5b43ab3baf3",
          "body": "…(#1266)\n\nThis is based on a build script that I've been using to streamline\nworking with worktrees. IE I wanted a single command to set up a\nworktree (main worktree OR extra worktrees), for myself and for agents\nto easily get going. The main way to use it is to run\n`./build_tools/wave-dev-setup.sh \n[…]\nuirement detection script to\nget the right pytorch. And it always builds waveasm and water.\nBut I think these are all the right defaults.\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Add wave-dev-setup.sh for worktree-aware build and environment setup …",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-04-07T20:41:00Z",
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          "oid": "28e8528cc57aa50699e7badf2e41136fb06d89ea",
          "body": "Vendor the ixsimpl expression simplifier (commit d41a625) as a\nfirst-party vendored dependency instead of a git+https pin. The full\nproject structure is preserved for easy upstream syncing.\n\nBuild integration: a plain setuptools Extension compiles the amalgamated\nC source into the ixsimpl._ixsimpl C\n[…]\nld_extension now delegates non-CMake extensions to the\nbase class.\n\n---------\n\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "Vendor ixsimpl as third_party/ixsimpl (#1217)",
          "author_name": "Ivan Butygin",
          "author_login": "Hardcode84",
          "committed_at": "2026-04-07T18:31:50Z",
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          "oid": "140ad78c2f7d615b9e378ac4bbdb9a826189950b",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260331...iree-3.12.0rc20260407\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1274)",
          "author_name": "iree-pr-automator[bot]",
          "author_login": "iree-pr-automator[bot]",
          "committed_at": "2026-04-07T17:13:58Z",
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        },
        {
          "oid": "c04e597770adfa99370c5f2d0ed87c24bd96353b",
          "body": "…resentations (#1271)",
          "is_bot": false,
          "headline": "[wave2water] Teach roundtrip comparison to accept more equivalent rep…",
          "author_name": "Martin Paul Lücke",
          "author_login": "martin-luecke",
          "committed_at": "2026-04-07T15:43:57Z",
          "body_truncated": false,
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        },
        {
          "oid": "dc7cdf51bc577541e769d675ca38913daf6c87fe",
          "body": "The initial linearization PR didn't apply to GatherToLDS ops. This fixes\nthat and thus reduces register pressure.\n\nThis enables annotate_iv_strides (which already handles GatherToLDS) and\nthe codegen LINEAR_INDEX path to work for GatherToLDS ops.\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Extend flatten_read_indices to linearize GatherToLDS src indices (#1241)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-04-07T15:11:54Z",
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          "is_coding_agent": false
        },
        {
          "oid": "16ffa6140d9724a4417cf40203839d23839e0341",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260330...iree-3.12.0rc20260331\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1214)",
          "author_name": "iree-pr-automator[bot]",
          "author_login": "iree-pr-automator[bot]",
          "committed_at": "2026-04-07T13:48:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "4ee4b11b703c9d02bd80a8c9a7217e54050f3379",
          "body": "Avoids most string attribute boxing/unboxing.",
          "is_bot": false,
          "headline": "[water] use WaveSymbolMappingAttr in lattice consistently (#1270)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-07T12:43:50Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "47516d49bfe128d247afbb37f7f35b65989736cf",
          "body": "Unlike DictionaryAttr, this container preserves the order of keys given\nat construction (as opposed to sorting alphabetically), which is\nload-bearing for later stages of Wave compilation.\n\nThis also avoids the reliance on strings and string comparisons when\nsymbols are processed.",
          "is_bot": false,
          "headline": "[water] use WaveSymbolMappingAttr for index expressions (#1235)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-07T11:15:03Z",
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        },
        {
          "oid": "58d97282b2d84d4b2365f23f45de8bf78d5bf675",
          "body": "…(#1269)\n\nThe ceiling() wrapping that handles bare fractions before affine conversion was gated on `isinstance(expr, sympy.Mul)`. Compound expressions like `A + B*floor(T/64)/2` (from MXFP4 wave_shape=(2,2)\ndivision) have `Add` as the top-level type and bypassed the guard, hitting `AffineConversionE\n[…]\nconditionally. `sympy.ceiling()` distributes correctly, and the converter's existing `ceiling` handler produces valid `ceildiv` affine expressions.\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
          "is_bot": false,
          "headline": "[water_emitter] Fix ceiling wrapping for compound affine expressions …",
          "author_name": "Martin Paul Lücke",
          "author_login": "martin-luecke",
          "committed_at": "2026-04-07T11:03:56Z",
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          "is_coding_agent": false
        },
        {
          "oid": "c2d2e7b052cfae841d081041690c20759697823c",
          "body": "Bumps the github-actions group with 7 updates in the / directory:\n\n| Package | From | To |\n| --- | --- | --- |\n| [pypa/cibuildwheel](https://github.com/pypa/cibuildwheel) | `3.4.0` |\n`3.4.1` |\n| [actions/upload-artifact](https://github.com/actions/upload-artifact)\n| `4.6.2` | `7.0.0` |\n|\n[actions/do\n[…]\n of the specified dependency and ignore\nconditions\n\n\n</details>\n\nSigned-off-by: dependabot[bot] <support@github.com>\nCo-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>",
          "is_bot": true,
          "headline": "Bump the github-actions group across 1 directory with 7 updates (#1264)",
          "author_name": "dependabot[bot]",
          "author_login": "dependabot[bot]",
          "committed_at": "2026-04-07T10:52:22Z",
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        },
        {
          "oid": "1c9d0c1ddb5da0397d274e738d91b925e307531f",
          "body": "The major blocker for universal read linearization was non-contiguous\ntensors under the LLVM dynamic-stride ABI. This PR enables\nflatten_read_indices for those paths by default and guards correctness\nwith a runtime contiguity assertion at kernel launch.\n\nWhat changes:\n\n- flatten_read_indices now run\n[…]\nts, import ordering fix.\n\nThis does not yet remove the linearize_reads compilation option. We\nstill need Water support and a few other minor things.\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Enable linearization for dynamic-stride and attention paths (#1240)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-04-06T21:56:40Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "59902dd116b3f788ca28f9e0cf0f4c324bcabf8a",
          "body": "…dedup, soffset folding, and SGPR address chain support (#1242)\n\nAdd localCSERange for cloned address chain deduplication. Add voffset\ndecomposition into (VGPR base, SGPR addend, instOffset constant) for\ncross-load deduplication. Add peepholeSoffsetFold to fold constant\nsoffsets into instOffset. Sup\n[…]\nrom gfx942 to gfx950\n- Added negative stride lit test (downward-counting IV with step=-1)\n\n---------\n\nSigned-off-by: xintin <gaurav.verma@amd.com>\nCo-authored-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "[asm] Enhance buffer load strength reduction with local CSE, voffset …",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-04-04T05:32:01Z",
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        },
        {
          "oid": "eae862b9ad0b09adfebc20f69667601bcaaf5a18",
          "body": "…gmentation (#1236)\n\nPost-allocation pass that reassigns physical VGPRs using shortest-first\ngreedy packing to eliminate fragmentation from interleaved `buffer_load`\n(long-lived) and `ds_read` (short-lived) destinations. Wired as\n`--waveasm-vgpr-compaction` in the pass pipeline after linear scan\nall\n[…]\nady locally optimal for minimizing `.vgpr_count`; the\npost-pass closes the remaining alignment gaps.\n\nSigned-off-by: xintin <gaurav.verma@amd.com>\nCo-authored-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "[asm] Cherry-pick: Add VGPR compaction pass to eliminate register fra…",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-04-03T23:12:03Z",
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        },
        {
          "oid": "6f4bd59b2eb35da77d850bfd3480fe371a0ddfa8",
          "body": "Add VGPR/SGPR rematerialization to shorten live ranges before allocation\nCherry-picked from\n[panditsa/wave@49d096c974c3](https://github.com/iree-org/wave/commit/49d096c974c3e7c99dddb9e5e63628329c2348a6)\n\n([4waveasm-256x192x256](https://github.com/iree-org/wave/compare/main...panditsa:wave:4waveasm-a\n[…]\nrity\n    - Add pressure-aware TODO replacing vague \"sophisticated algorithm\"\n    - Add lit tests covering all three remat patterns + loop guard\n\n---------\n\nSigned-off-by: xintin <gaurav.verma@amd.com>",
          "is_bot": false,
          "headline": "[asm]cherry pick and add tests for s/vgpr remat changes (#1226)",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-04-03T21:51:07Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "397a29833d48e9e45fc07a7f4e1f8eabafa893ef",
          "body": "Model the AMDGCN Scalar Condition Code (SCC) flag as a first-class MLIR\ntype in WaveASM instead of treating it as an implicit side effect.\n\n### Problem\n\nMany SALU instructions (bitwise, shifts, adds, compares) clobber the\nhardware SCC flag, but WaveASM previously had no way to represent this\nin the \n[…]\nllision with another PR\n\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: Sanket Pandit <sanket.pandit@amd.com>\nCo-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "Reland [asm] Explicit SCC modeling (#1219) (#1239)",
          "author_name": "Ivan Butygin",
          "author_login": "Hardcode84",
          "committed_at": "2026-04-03T20:55:48Z",
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          "is_coding_agent": true
        },
        {
          "oid": "d8b7c88f1620226f2c16c6ba241899ae9689f8a6",
          "body": "This reverts commit b07277d3b05989d004fa87960cd2af4408c96364.\n\nSigned-off-by: xintin <gaurav.verma@amd.com>",
          "is_bot": false,
          "headline": "Revert \"[asm] Explicit SCC modeling (#1219)\" (#1237)",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-04-03T19:37:34Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "d99e86e3160162e97358099d5687e1ced6a12886",
          "body": "…ation (#1218)\n\n- **Replace O(n) RegPool with O(1) BitVector and add bidirectional VGPR\nallocation** — Register operations use `llvm::BitVector` instead of\nsorted free-list scans. Multi-register VGPR ranges spanning >75% of the\nprogram are allocated from the top of expected usage, separating\nlong-li\n[…]\nw `linear-scan-bidirectional.mlir` covers long-lived\nvs short-lived allocation, loop double-buffer pattern, and\nsingle-reg/SGPR bypass.\n\n---------\n\nSigned-off-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "[asm] Rewrite RegPool with BitVector and add bidirectional VGPR alloc…",
          "author_name": "Sanket Pandit",
          "author_login": "panditsa",
          "committed_at": "2026-04-03T17:37:07Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "b319e9161bb17f01c8f193a5142c6d7cb17cc6cd",
          "body": "…LU add/mul (#1225)\n\n- **Add compile-time constant folding for `V_ADD_U32` and\n`V_MUL_LO_U32`** — When both operands are compile-time constants\n(including through `V_MOV_B32` indirections via `getConstantValue`),\nfold the operation into a `v_mov_b32` of the computed result with 32-bit\nwrapping. Mult\n[…]\ncovering constant folding (add, mul), 32-bit\noverflow wrapping, large-operand truncation, and MOV-indirection for\nzero/one elimination.\n\n---------\n\nSigned-off-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "[asm] Enhance peephole pass with compile-time constant folding for VA…",
          "author_name": "Sanket Pandit",
          "author_login": "panditsa",
          "committed_at": "2026-04-03T17:00:56Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "b07277d3b05989d004fa87960cd2af4408c96364",
          "body": "Model the AMDGCN Scalar Condition Code (SCC) flag as a first-class MLIR\ntype in WaveASM instead of treating it as an implicit side effect.\n\n### Problem\n\nMany SALU instructions (bitwise, shifts, adds, compares) clobber the\nhardware SCC flag, but WaveASM previously had no way to represent this\nin the \n[…]\nte operands.\n\n---------\n\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: Sanket Pandit <sanket.pandit@amd.com>\nCo-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "[asm] Explicit SCC modeling (#1219)",
          "author_name": "Ivan Butygin",
          "author_login": "Hardcode84",
          "committed_at": "2026-04-03T16:40:03Z",
          "body_truncated": true,
          "is_coding_agent": true
        },
        {
          "oid": "a5f720d2229f1cc33eb547ee0e38edf167d8c671",
          "body": "…ss sort order + tests and fixes (#1220)\n\n- Cherry-picks\n[125cdc2](https://github.com/iree-org/wave/commit/125cdc213593411768ea494088e2f12eb81849c7)\n(\"Generalize WAR hazard detection and improve liveness sort order\")\nwhich extends WAR hazard detection beyond buffer_load to cover any\niter_arg/block_a\n[…]\nalue always has a defining op\n> - Adds tie-break rationale to the sort comparator comment\n\n---------\n\nSigned-off-by: xintin <gaurav.verma@amd.com>\nCo-authored-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "[asm] Cherry pick: Generalize WAR hazard detection and improve livene…",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-04-03T16:10:12Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "059c25ba2c0ee76bd260f3ead5e92dfee1407c25",
          "body": "The main goal of this is to be able to have memory addresses for reads\nin a loop be simplified to `start + IV * stride`, with each of those\nvalues either being constant or at least able to be hoisted outside of\nthe loop body.\n\nAdds a pre-codegen pipeline that flattens N-dimensional read addresses\nin\n[…]\n reads\n\nThis adds some new lit tests that show that with our mxfp4 shuffle\nlayout we can generate linearized reads with constant stride.\n\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Linearize read indices pipeline (#1196)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-04-03T15:06:46Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "e85de690aa6c77fcef9eb9fd610a38f0ff98410b",
          "body": "ScaledMMA is an MMA for heuristic purposes, should be treated in the\nsame way.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] account for ScaledMMA in propagation heuristic (#1234)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-03T14:20:03Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "e2e5faa6113eddf2a6219d8409f3a09a6f140607",
          "body": "Mostly NFC.\n\nThis provides a more sound alternative with the right key type to\nDictionaryAttr and will allow to remove string-based comparisons.\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] use WaveSymbolMappingAttr for vector shapes (#1233)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-03T13:04:19Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "bef40dba3767287b6a0b9c77bbff14d33c9fc14d",
          "body": "Group all logic pertaining to index expressions in\nIndexExprInference.h/cpp. This fixes the layering between interfaces\nthat need be op-agnostic and analysis using the interface that isn't.\n\nMove the index expression inference pass into its own file from\nInferTypes.cpp where it was originally bootstrapped to reuse lattice\nutilities.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\nCo-authored-by: Claude Opus 4.6 <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "[water] reorganize index expr related files, NFC (#1231)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-03T08:55:09Z",
          "body_truncated": false,
          "is_coding_agent": true
        },
        {
          "oid": "3a3fd6fcdb797dd6228ccccb047eb929e06e08ac",
          "body": "This is a separate field of the index expression lattice so it is\nhelpful to highlight which field is causing conflicts.\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\nCo-authored-by: Tim Gymnich <tim@gymni.ch>",
          "is_bot": false,
          "headline": "[water] improve error message for source vector shape conflict (#1230)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-02T21:18:28Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "baaff6cfbc2231040fc9c23174ba428057b84515",
          "body": null,
          "is_bot": false,
          "headline": "Add a e2e test for water index exprsssions in attention (#1171)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-02T19:18:27Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "193d30b02c6bf35ea891d0f5c85020594c5ff407",
          "body": "Signed-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "fix syntax error (#1232)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-02T16:54:39Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "de592dcd5df783b78c8c39e1304484a854e3a1fb",
          "body": "It is unfortunately necessary to introduce this additional complexity to\nreflect the naive non-dataflow approach in the python counterpart: keep\ntrack of the vector shape of the operation from which the lattice\noriginally propagates. This is required by the propagation-stopper\nheuristic that cannot \n[…]\ne, but necessary to match\nthe current behavior. It must be revised as soon as possible to avoid\npriorities and non-local behavior altogether.\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] provenance-based propagation heuristic (#1206)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-02T15:41:34Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "d0c4b8bd0c21fc3c8cabcc1738413bf3f45e295c",
          "body": "This has been failing intermittently on CI for over a month with no\nintention to fix, I'm tired of having to triage.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "disable flaky rdna4 test (#1229)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-04-02T15:38:24Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "c283f993f95d6fb58075f1515aeaebdeab65cc42",
          "body": "- Add ScaledMMAOp\nfixes #924\n\n---------\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>",
          "is_bot": false,
          "headline": "[water] Add ScaledMMAOp (#1136)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-04-02T13:50:40Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "b2301899ffb626bf4cd269451816f02690358f04",
          "body": "Add a progressive MLIR roundtrip test for the tagged MXFP4 GEMM kernel\n(`get_tagged_mxfp4_gemm` + `get_mxfp4_dbuf_schedule`), matching the\nconfiguration used in `examples/python/7.1_schedule.py`. All 49 pipeline\npasses are xfailed, with currently visible causes being:\n\n- Passes 1-11: emitter lacks a\n[…]\nn_progressive_roundtrip` resilient to pass crashes\nvia try/except/else so a single crashing pass no longer aborts the\nremaining passes.\n\nFixes #925\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
          "is_bot": false,
          "headline": "[wave2water] Add MXFP4 GEMM progressive roundtrip test (#1224)",
          "author_name": "Martin Paul Lücke",
          "author_login": "martin-luecke",
          "committed_at": "2026-04-02T06:48:44Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "6fb475195ff2eaea8e8cf932a96307010394d92d",
          "body": "…209)\n\nAdd NonEmittingOp trait to replace the hardcoded op list in\nHazardMitigation, and add InsertOp as the dual of ExtractOp for in-place\nsub-register replacement in wide registers.\n\nNonEmittingOp trait is applied to PackOp, ExtractOp, InsertOp,\nPrecoloredSRegOp, PrecoloredVRegOp, ConstantOp, DCEP\n[…]\nandleFatRawBufferCast\nsuppress-swizzle path for PackOp-built SRDs.\n\n---------\n\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "[waveasm] Add NonEmittingOp trait and InsertOp to WaveASM dialect (#1…",
          "author_name": "Ivan Butygin",
          "author_login": "Hardcode84",
          "committed_at": "2026-04-01T15:17:58Z",
          "body_truncated": true,
          "is_coding_agent": true
        },
        {
          "oid": "725f3bae7c4819c76cba95f7a72ade2ebcf790f7",
          "body": "…R roundtrip (#1213)\n\nFix `in_thread_transpose` passing a bare `int` to `Reshape.target_vector_shape` where the type annotation requires `dict[IndexSymbol, int]`. This was the only call site violating the contract (e.g. `decompose_scan_ops.py` does it correctly). Removes the FIXME(#873) workaround i\n[…]\nr always recreates one per iterate result.\n\nTogether, these fixes resolve all outstanding round-trip failures for the attention kernel.\nFixes #1019\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
          "is_bot": false,
          "headline": "[wave2water] Fix Reshape type violation and enable full attention MLI…",
          "author_name": "Martin Paul Lücke",
          "author_login": "martin-luecke",
          "committed_at": "2026-04-01T09:29:19Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "99697f0bcd64898455ddf720732f0d414df3c7c9",
          "body": "When the compiler emits IR for sympy expressions containing multiple\nfraction additions, it defaulted to cross-multiplication even when the\ndenominator was the same across all fractions. This caused denominator\nexplosion. This is now fixed : it identifies when denominators are\nidentical and directly adds the corresponding numerators instead.\n\n---------\n\nSigned-off-by: Aurore De Spirlet <aurore.despirlet@amd.com>",
          "is_bot": false,
          "headline": "Optimize same-denominator fraction addition in gen_sympy_index (#1212)",
          "author_name": "Aurore De Spirlet",
          "author_login": "adedespirlet",
          "committed_at": "2026-04-01T00:32:34Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "0d4eb3f916ba7e82e1fb6d9729246af99292e420",
          "body": "Fix opsel scaled_mfma pass for (2,2) wave shapes and asymmetric blocks\n\nSquashed cherry-pick of 7 opsel/scale coalescing fixes from\n`panditsa:4waveasm-256x192x256`:\n1. Handle untraceable yield values in _find_mergeable_groups (aa2a9754)\n2. Add _merge_scale_byte_loads for unrolled sub-word scale load\n[…]\n was passed to scf.YieldOp, which crashed.\nFix: Added a filter to drop unresolved groups (yield_source=None) before\nbuilding the coalesce plan.\n\n---------\n\nSigned-off-by: xintin <gaurav.verma@amd.com>",
          "is_bot": false,
          "headline": "[asm] Cherry pick opsel scaled mfma fix (#1215)",
          "author_name": "Gaurav Verma",
          "author_login": "xintin",
          "committed_at": "2026-03-31T22:59:21Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "0cbff5e8406989e3e10753532820c4917a815a8d",
          "body": "Support roundtripping vector shapes. This required special handling for\nMMA ops where, on the MLIR side, we set vector shapes as a list for LHS,\nRHS, Accumulator and Result similarly to index expressions and, on the\nFX side, there is a single vector shapes entry that contains dimensions\nfrom all val\n[…]\nrateOp in the dialect\ninstead since GetResult are fundamentally absent from the MLIR\ncounterpart. An alternative solution could be to simply ignore GetResult\nduring comparison of vector shape entries.",
          "is_bot": false,
          "headline": "[wave2water] roundtrip vector shapes (#1202)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-31T10:41:44Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "46a069d90204092866a0e74f0e428b9a72658d13",
          "body": "- Adds `_resolve_chained_subs` to\n`wave_lang/kernel/_support/indexing.py` which topologically sorts\nsubstitution entries by their symbol dependencies, ensuring derived\nsymbols like `K_SCALE = K // 32` fully resolve when `K` is also in the\nsubstitution dict.\n- `IndexingContext.set_subs` now calls `_r\n[…]\ngle/multi-level chains, floor-div,\nPiecewise, circular dependency warnings, order independence, and\nintegration with `IndexingContext`.\n\n---------\n\nSigned-off-by: Sanket Pandit <sanket.pandit@amd.com>",
          "is_bot": false,
          "headline": "Resolve chained symbol dependencies in IndexingContext.set_subs (#1183)",
          "author_name": "Sanket Pandit",
          "author_login": "panditsa",
          "committed_at": "2026-03-30T21:29:40Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "f2028ec55c8e61bcacbc22232b1f596609d39e9e",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260327...iree-3.12.0rc20260330\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1207)",
          "author_name": "iree-pr-automator[bot]",
          "author_login": "iree-pr-automator[bot]",
          "committed_at": "2026-03-30T20:24:52Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "e94fc5a59ee4975d815a59f6bc459c95fc9ef86f",
          "body": "…(#1188)\n\nEliminate all raw assembly string manipulation from SRD (Shader Resource\nDescriptor) construction, replacing it with typed MLIR ops visible to\nthe register allocator.\n\n### What changed\n\n**Core refactor:** SRD construction in `handleFatRawBufferCast`,\n`emitSRDBaseAdjustment`, and `handleMak\n[…]\n pass now inserts explicit copies for ExtractOp\ninputs to PackOps.\n\n---------\n\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "[asm] Replace RawOp with typed SALU ops + PackOp in SRD construction …",
          "author_name": "Ivan Butygin",
          "author_login": "Hardcode84",
          "committed_at": "2026-03-30T19:02:53Z",
          "body_truncated": true,
          "is_coding_agent": true
        },
        {
          "oid": "d518d4ef77c5f9234ca2b2f458b433b50534b25a",
          "body": "…1184)\n\nisMultiWaveKernel() only checked workgroup_size_y > 1 or _z > 1, missing\nkernels like [256, 1, 1] that pack 4 waves into the X dimension. This\ncaused gpu.thread_id to emit v_mbcnt (lane_id 0-63) instead of reading\nhardware v0 (workitem_id_x 0-255), so every wave saw the same thread IDs\nand wrote to the same output region.\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Fix isMultiWaveKernel() to detect multi-wave kernels with wgX > 64 (#…",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-03-30T17:12:35Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "52f520409118b4fe09f4ac85ff609665c2420edb",
          "body": "…calization (#1208)\n\nPreviously, `vector_shapes` were only present on `IterArg` and\n`GetResult` nodes from the original graph, but not propagated when new\ninstances of these nodes were created during software pipelining or when\ncapture placeholders were materialized for region-captured operands.\n\nTh\n[…]\nlders created by\n`materialize_capture_placeholder` and `_canonicalize_nested_region`,\nfixing missing shapes on region-captured operands.\n\n---------\n\nSigned-off-by: Martin Lücke <martin.luecke@amd.com>",
          "is_bot": false,
          "headline": "Propagate vector_shapes through loop reconstruction and region canoni…",
          "author_name": "Martin Paul Lücke",
          "author_login": "martin-luecke",
          "committed_at": "2026-03-30T16:18:43Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "6e3416cc79cf95b1255390ca62ff8c5334f62ec9",
          "body": "…(#1197)\n\nWhen the waveasm backend runs out of registers, the assembler previously\nproduced many repeated \"register index is out of range\" errors (one per\ninstruction using an out-of-range register). Replace this with a single\ndiagnostic that states how many registers the kernel needs vs. how many\na\n[…]\nlimit (which can happen when\nthe emitter adds swap-temp registers for loop back-edge copies), emit\none error before writing any assembly.\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "[waveasm] Emit a single clear error when register budget is exceeded …",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-03-30T16:06:18Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "35799f1b4410a2ff1a3c934e6743b6280e3ba524",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260325...iree-3.12.0rc20260327\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\n---------\n\nSign\n[…]\nreply.github.com>\nSigned-off-by: Ivan Butygin <ivan.butygin@gmail.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>\nCo-authored-by: Ivan Butygin <ivan.butygin@gmail.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1201)",
          "author_name": "iree-pr-automator[bot]",
          "author_login": "iree-pr-automator[bot]",
          "committed_at": "2026-03-28T23:52:11Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "2989d7a056493439c64d5c9d66572b768afcf314",
          "body": "Introduces wave.bitcast, a new Water dialect op that reinterprets the\nraw bits of a register-resident tensor as a different element type.\nUnlike a plain type cast, bitcast preserves the total bit count by\nscaling exactly one tensor dimension by the source-to-destination\nelement bitwidth ratio.\n\nNew \n[…]\n dimension symbolically.\n\nLowering\n- Pattern to lower wave.bitcast between fully-typed wave tensors to an\narith.bitcast on the underlying vector.\n\nfixes #922\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>",
          "is_bot": false,
          "headline": "[water] Add BitcastOp and Scaled Dimensions (#1135)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-03-28T08:38:06Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "2d2aeaa16ae0e97cfa86b13e41d62c9ee9926fd9",
          "body": "Reverts iree-org/wave#1187\n\nThis is breaking some tests, but wasn't caught by CI because of a race\nin merges.",
          "is_bot": false,
          "headline": "Revert \"Bump IREE requirement pins to their latest versions.\" (#1204)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-27T17:11:45Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "cbbca6529bec51531577e7009b6e1971aee0fe23",
          "body": "Diff:\nhttps://github.com/iree-org/iree/compare/iree-3.12.0rc20260324...iree-3.12.0rc20260325\n\nAuto-generated by GitHub Actions using\n[`.github/workflows/update_iree_requirement_pins.yml`](https://github.com/iree-org/wave/blob/main/.github/workflows/update_iree_requirement_pins.yml).\n\nSigned-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>\nCo-authored-by: iree-pr-automator[bot] <iree-github-actions-bot@google.com>",
          "is_bot": true,
          "headline": "Bump IREE requirement pins to their latest versions. (#1187)",
          "author_name": "iree-pr-automator[bot]",
          "author_login": "iree-pr-automator[bot]",
          "committed_at": "2026-03-27T09:08:30Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "e3e3cd9be5800246c41ca49f0e3f414f43932484",
          "body": "Port the heuristic stopping index expression propagation from pywave. It\nis vaguely based on the notion of completeness and avoids propagating\nincomplete index expression sets, i.e., sets that are not covering\ndimensions that will be subject to expansion later on. In practice, it\nserves to avoid expression conflicts in attention kernels.",
          "is_bot": false,
          "headline": "[water] index propagation stopper heuristic (#1165)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-27T09:06:22Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "775f1a3d5b239e09b46b091b16bdddfa8a14021e",
          "body": "All of our requirements files have a maximum bound of torch <2.9, except\nour pyproject.toml was different (<2.10). This standardizes them by\nbumping up to 2.10 everywhere. Previously a bump up broke CI, but I want\nto try again without the other changes that were in the last PR that did\nthis, and see whether they are real failures or just flakey tests.\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "standardize torch version bounds, bumping up to 2.10 (#1190)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-03-26T20:44:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "4c832971c2b78c182cee163054ceaf6493e27a0b",
          "body": "Signed-off-by: Tim Gymnich <tim@gymni.ch>\nCo-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "Add requirements-pytorch-rocm-generated.txt to gitignore (#1195)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-03-26T12:41:21Z",
          "body_truncated": false,
          "is_coding_agent": true
        },
        {
          "oid": "f8519c917f5a01974cc91dc35f64102fbd42e921",
          "body": "remove left over write to file\n\n🤖 Generated with [Claude Code](https://claude.com/claude-code)\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>\nCo-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "Remove debug output in tests (#1193)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-03-26T11:58:25Z",
          "body_truncated": false,
          "is_coding_agent": true
        },
        {
          "oid": "32e5fc752d125431b6812f7b8c59badc250029ed",
          "body": "This is similar to index expressions and should arguably be integrated\nwith them. For now, attaching these as attributes for consistency with\npywave.",
          "is_bot": false,
          "headline": "[water] attach vector shapes to ops (#1181)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-26T10:46:07Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "951ad78ddcfc2ceea4bbf5a219255422066f04fc",
          "body": "## Summary\n- Bumps `iree-base-compiler` and `iree-base-runtime` from `~=3.11.0rc`\nto `~=3.12.0rc` in `pyproject.toml`\n\n🤖 Generated with [Claude Code](https://claude.com/claude-code)\n\nSigned-off-by: Tim Gymnich <tim@gymni.ch>\nCo-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>",
          "is_bot": false,
          "headline": "Bump IREE RC version to 3.12 (#1192)",
          "author_name": "Tim Gymnich",
          "author_login": "tgymnich",
          "committed_at": "2026-03-26T09:16:06Z",
          "body_truncated": false,
          "is_coding_agent": true
        },
        {
          "oid": "396ee770f9286faee162ebe6fba99d5d2301a8e8",
          "body": "The gen-pytorch-rocm-requirements.py script was selecting the first\nwheel source whose URL responded to an HTTP HEAD, without checking\nwhether it actually contained a torch version matching the spec. When\nthe PyTorch Foundation rocm7.2 index only carries torch>=2.11 but\nTORCH_SPEC requires <2.9, the\n[…]\ning a source.\nThis lets the script correctly fall through to the AMD --find-links repo\nwhen the PyTorch index lacks a compatible version.\n\n---------\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "Probe for matching torch version, not just live URL (#1185)",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-03-25T15:53:05Z",
          "body_truncated": true,
          "is_coding_agent": false
        },
        {
          "oid": "ca6e6fd112d65b4ea36f5f759c95f2befec38196",
          "body": "Only add them to tensors indexed by the induction variable.",
          "is_bot": false,
          "headline": "[water] don't add tiling constraints to irrelevant indexes (#1170)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T12:00:33Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "d4ddd3d9a73f509e1731308c55cf1f7879ccdc28",
          "body": "Remove the microoptimization since it results in `getresult` operation\nhaving index expressions, just incorrect ones, confusing for whoever\nattempts to debug the algorithm.",
          "is_bot": false,
          "headline": "propagate indices into getresult (#1169)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T12:00:10Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "65b65882849add20b5e41f0cf434f7310b2bc7ab",
          "body": "Add instructions attempting to improve code review quality.",
          "is_bot": false,
          "headline": "[water] add copilot instructions (#1186)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T11:59:32Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "ee4018ac38ce72f16e4f774efd9588d44cbba808",
          "body": "These were not supported originally but may happen in practice, in\nparticular for fused attentions.",
          "is_bot": false,
          "headline": "[wave2water] water analysis for multi-result iterates (#1167)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T09:27:21Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "7e85ef37c627fb6cede30af4451ff2fd103b8ed8",
          "body": "Identification of dimensions categories wasn't taking into account batch\ndimensions since it was written before we introduced those.",
          "is_bot": false,
          "headline": "[wave2water] correctly convert index expressions for batched mma (#1168)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T08:54:04Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "f5f330db3d50a944048e6b75b65c8331d0ce4712",
          "body": "Pywave may insert broadcasts and reshapes during the index inference and\nthey won't have water_id, or index expressions for that matter.",
          "is_bot": false,
          "headline": "[wave2water] handle missing water_id gracefully (#1166)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-25T08:21:02Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "bef3b82c5502504f9d6cc1ef5009562ab36d4736",
          "body": "Set the co-called thread-independent constraints for all operations, not\nonly for privileged operations such as mmas and writes, during index\nexpression propagation. These include quantities derived from vector\nshapes, now available, or default indexing with 0 offset for dimensions\nnot involved in privileged operations and otherwise not deducible.\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>\n\n---------\n\nSigned-off-by: Alex Zinenko <git@ozinenko.com>",
          "is_bot": false,
          "headline": "[water] default-initialize index expressions for all ops (#1162)",
          "author_name": "Oleksandr \"Alex\" Zinenko",
          "author_login": "ftynse",
          "committed_at": "2026-03-24T18:42:35Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "f223c86396b699a65b7e62e49f27fed65cf03987",
          "body": "… (#1147)\n\nThe static file hardcoded ROCm 6.4, which breaks on other ROCm versions.\nUse gen-pytorch-rocm-requirements.py everywhere (IE in documentation,\nCI) instead, which auto-detects the installed ROCm version and probes\nfor a matching PyTorch wheel source.\n\nThis is a follow-up to the discussion in\nhttps://github.com/iree-org/wave/pull/1134\n\nSigned-off-by: William G Hatch <william@hatch.uno>",
          "is_bot": false,
          "headline": "remove the static pytorch-rocm-requirements.txt, always use generator…",
          "author_name": "William G Hatch",
          "author_login": "willghatch",
          "committed_at": "2026-03-24T17:23:46Z",
          "body_truncated": false,
          "is_coding_agent": false
        },
        {
          "oid": "583f4b11c799859ec88fa0d8e34f02c8e8f4a720",
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                "key": "contributor_breadth",
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                "key": "openssf_scorecard_contributors",
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                "key": "tests_present",
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              {
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              },
              {
                "key": "openssf_scorecard_ci_tests",
                "name": "OpenSSF Scorecard: CI-Tests",
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                ],
                "max_points": 20
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            ]
          },
          {
            "key": "documentation",
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                "status": "met",
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              {
                "key": "documentation_directory",
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                "points": 25,
                "status": "met",
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                "key": "documentation_homepage_site",
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                "points": 0,
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                "key": "wiki",
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                "status": "missed",
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        ],
        "description": "Are baseline engineering and documentation practices in place?"
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      {
        "key": "security",
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                "code": "excluded_no_data",
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              {
                "code": "weights_renormalized",
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            "value": 33,
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            "components": [
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                "key": "security_policy_security_md",
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                "points": 0,
                "status": "missed",
                "details": [],
                "max_points": 30
              },
              {
                "key": "dependabot_config",
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                "points": 25,
                "status": "met",
                "details": [],
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              {
                "key": "dependency_lockfiles",
                "name": "Dependency lockfiles",
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                "status": "excluded",
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            ]
          },
          {
            "key": "dependency_advisories",
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            "name": "Dependency advisories",
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                "code": "weights_renormalized",
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              {
                "code": "advisories_scope_repository",
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              {
                "code": "advisories_unassessed",
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                "code": "advisories_repo_graph_caveat",
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                "code": "advisories_reachability",
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                "key": "direct_dependencies_free_of_known_advisories",
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                "key": "indirect_dependencies_free_of_known_advisories",
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                "points": 0,
                "status": "excluded",
                "details": [
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                ],
                "max_points": 25
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              {
                "key": "no_advisories_left_outstanding",
                "name": "No advisories left outstanding",
                "detail": "no advisory carries a publication date",
                "points": 0,
                "status": "excluded",
                "details": [
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          },
          {
            "key": "malicious_dependencies",
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            "notes": [],
            "value": 100,
            "inputs": {
              "source": "osv",
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              "direct_malicious_packages": 0,
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                "key": "no_dependency_reported_as_a_malicious_package",
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                "max_points": 100
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            ]
          },
          {
            "key": "high_risk_jurisdiction_exposure",
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            "note": "Only high-confidence self-published location evidence affects this multiplier. Ambiguous matches are review-only; country evidence is not proof of nationality, citizenship, legal registration, malicious intent, or sanctions status.",
            "notes": [
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                "code": "jurisdiction_evidence_limits",
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            "value": 100,
            "inputs": {
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                "key": "policy_exposure_multiplier",
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                "status": "missed",
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          },
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                "key": "openssf_scorecard_pinned_dependencies",
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