原始 JSON 报告 机器可读
{
"data": {
"repo": {
"topics": [],
"is_fork": false,
"size_kb": 2488,
"has_wiki": false,
"homepage": null,
"languages": {
"Rust": 5584060,
"Shell": 3444
},
"pushed_at": "2026-07-19T22:47:32Z",
"created_at": "2018-10-14T06:30:09Z",
"owner_type": "Organization",
"updated_at": "2026-07-20T01:16:14Z",
"description": null,
"is_archived": false,
"is_disabled": false,
"license_spdx": "Apache-2.0",
"default_branch": "main",
"license_spdx_raw": "Apache-2.0",
"primary_language": "Rust",
"significant_languages": [
"Rust"
]
},
"owner": {
"blog": "https://linebender.org/",
"name": "Linebender",
"type": "Organization",
"login": "linebender",
"company": null,
"location": null,
"followers": 755,
"avatar_url": "https://avatars.githubusercontent.com/u/46134943?v=4",
"created_at": "2018-12-25T15:55:09Z",
"is_verified": null,
"public_repos": 40,
"account_age_days": 2765
},
"license": {
"state": "standard",
"spdx_id": "Apache-2.0",
"raw_spdx": "Apache-2.0",
"file_present": true,
"scorecard_found": true,
"profile_has_license": true
},
"activity": {
"releases": [
{
"tag": "v0.6.0",
"kind": "minor",
"published_at": "2026-07-10T17:58:36Z"
},
{
"tag": "v0.5.0",
"kind": "minor",
"published_at": "2026-06-18T19:29:00Z"
},
{
"tag": "v0.4.1",
"kind": "patch",
"published_at": "2026-05-16T09:52:11Z"
},
{
"tag": "v0.4.0",
"kind": "minor",
"published_at": "2026-02-13T19:31:41Z"
},
{
"tag": "v0.3.0",
"kind": "minor",
"published_at": "2025-10-14T15:10:53Z"
},
{
"tag": "v0.2.0",
"kind": "minor",
"published_at": "2025-08-26T14:30:25Z"
}
],
"recent_commits": [
{
"oid": "763de611dfd53164d818fe12385dde29ecc5f40f",
"body": "It was originally on Medium, but people reported registration walls and\npaywalls, so I copied the content onto github gist to get around that.\n\nI've finally set up a proper blog on github pages, so point links to\nthat instead of a random gist on github.",
"is_bot": false,
"headline": "Repoint article URLs from github gist to my blog (#277)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-19T22:42:53Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "36adebbe4afea1b7280e48a5726046698a94fec1",
"body": "Fulfills #256\n\nSSE2 is guaranteed to be present in the baseline on x86_64, and the Rust\ni686 targets also guarantee its presence. You need to use the tier-2\ni586 target to opt out. So this replaces Fallback on x86 and does not\nbloat the binary, even on 32-bit targets.\n\nNot having SSE4.2 is quite rar\n[…]\nut [u8; 16],\n max_out: &mut [u8; 16],\n) {\n let a = u8x16::from_slice(simd, a);\n let b = u8x16::from_slice(simd, b);\n a.min(b).store_slice(min_out);\n a.max(b).store_slice(max_out);\n}\n```",
"is_bot": false,
"headline": "Add SSE2 backend (#270)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-18T14:27:18Z",
"body_truncated": true,
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},
{
"oid": "45eee37582776b8947c518c07c3296a66e4b7d07",
"body": "…md API (#274)\n\nAdds convenience functions that lower into `slide` behind the scenes,\nmatching the `std::simd` API and improving discoverability.\n\nNo new intrinsic/platform-specific code is added, since this simply\nlowers into calls to the existing slide() op.\n\nCloses https://github.com/linebender/fearless_simd/issues/269",
"is_bot": false,
"headline": "Add shift_elements_* and rotate_elements_* functions to match std::si…",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-16T18:46:27Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "3d10e36bae31987855e784de907de308803f90e5",
"body": "While we didn't make any API-breaking changes, previously the widest\nnative vector width was 256 bits, and downstream code could implicitly\ndepend on it. #261 demonstrates this failure mode. So I think calling it\n0.6.0 is prudent.",
"is_bot": false,
"headline": "Release 0.6.0 (#262)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-10T17:49:03Z",
"body_truncated": false,
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},
{
"oid": "00ab265a786ef80ac6d81916973ef87bc3f4a876",
"body": "An alternative to #258\n\nThe problem with features is that they apply to the entire dependency\ntree, and anything in the dependency tree can enable them. So if you\nhave a library in the dependency tree that uses fearless_simd, it either\nuses fearless_simd with default features on and locks all users \n[…]\nSse4_2` variant would be\nabsent in builds that have a higher baseline, breaking certain `kernel!`\nusage as well as any user code that matched on it. This was not the case\nfor Avx2 and Avx512 variants.",
"is_bot": false,
"headline": "Change multiversioning control from features to cfgs (#264)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-10T13:19:50Z",
"body_truncated": true,
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},
{
"oid": "5cccb417e4c0600ca93feaca15cdbfc9cb4bee57",
"body": "This addresses my criticism of #265\n\nThis maps to cheap hardware instructions on x86 and also maps really\nwell to split+combine on blocks on NEON and WASM, so unlike #265 this\ncan be implemented for all widths.\n\nThe API follows the `std::simd`\n[`swizzle_dyn`](https://doc.rust-lang.org/stable/std/sim\n[…]\nscalar fallback is branch-free thanks to `% len` which should be\nfaster than the branchy fallback in #265 and also more amenable to\nautovectorization on obscure platforms we don't have intrinsics for.",
"is_bot": false,
"headline": "Implement swizzle_dyn_within_blocks, add tests (#266)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-05T19:08:00Z",
"body_truncated": true,
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},
{
"oid": "57d06a768d00395223b8b0681c35352a5364d2b7",
"body": "…(#263)\n\nI've overlooked this when adding AVX-512 support",
"is_bot": false,
"headline": "Correctly omit AVX2 codepaths when Ice Lake feature set is available …",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-07-01T11:47:02Z",
"body_truncated": false,
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{
"oid": "9d2a013dd1e7569ab5b0ab9b226cb53b7f4e558b",
"body": "Now that AVX-512 is supported, on machines with it the old 256-bit wide\ninputs would be too small and the output was always all zeroes.",
"is_bot": false,
"headline": "Widen inputs in standalone examples (#261)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-30T19:18:39Z",
"body_truncated": false,
"is_coding_agent": false
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{
"oid": "2750ac415243f988d8a0bc4eff3376ec0f09680a",
"body": "Follow-up to #258\n\nThis was brought up in the review so it's best to document it in code:\nhttps://github.com/linebender/fearless_simd/pull/258#discussion_r3500614728",
"is_bot": false,
"headline": "Add comment in a macro (#260)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-30T18:29:29Z",
"body_truncated": false,
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},
{
"oid": "ec02d46da5279dafd98605672b5bc4573fc8abad",
"body": "A different, better take on #228. It doesn't disable the tokens\nthemselves and still lets you use `kernel!` with whatever features you\nplease. The cargo features only control multiversioning via the\n`dispatch!` macro for functions generic over `Simd`.\n\n~~TODO: better documentation, incl. on opting o\n[…]\ny authors, advice on\nreducing binary size without degrading performance via codegen-units=1\nand lto=true~~ Done\n\n---------\n\nCo-authored-by: Laurenz Stampfl <47084093+LaurenzV@users.noreply.github.com>",
"is_bot": false,
"headline": "Multiversioning behind feature flags for SIMD levels (#258)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-30T18:16:13Z",
"body_truncated": true,
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{
"oid": "5ffa1b7ca84938e487873ba87ce9cdbcd54d310c",
"body": "This is a simple copy-paste job to make the tests a little less\nscattered.\n\nThere's certainly more to be done, but this looks like an\nuncontroversial starting point.",
"is_bot": false,
"headline": "Merge LLM-generated 512-bit tests into a single file (#257)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-28T22:03:19Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "841e332cfa6a6217725fe8f272734ee0a8c680fe",
"body": "Yes, really. It's all here. In one humongous PR. Sorry :sweat_smile: \n\nThis is probably best reviewed commit-by-commit. The first commit is\nstill big because the history was getting really messy with changes and\nrollbacks, and squashing it made it less of a mess.\n\nThis also touches other backends in\n[…]\nown PR but I wanted the insurance right away.~~ This\nwas split and shipped in v0.5.0\n\nEverything changed here should be covered by tests. I've expanded test\ncoverage where it was lacking.\n\nCloses #179",
"is_bot": false,
"headline": "Add AVX-512 support (#231)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-28T20:44:03Z",
"body_truncated": true,
"is_coding_agent": false
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{
"oid": "8f621a975489297287666c2aaf262934e47c8fa7",
"body": "Co-authored-by: Laurenz Stampfl <laurenz@canva.com>",
"is_bot": false,
"headline": "CI: Lock cargo-rdme version (#254)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-06-26T04:26:02Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "182d1c41f60f3b07a11142920256c38dc886907d",
"body": "Remove \"experimental\" warning from the README, brag about our offerings,\nand add an example for every abstraction level.",
"is_bot": false,
"headline": "Update README (#252)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-23T08:57:41Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "9c5343f6783d0b51eac94bed7bb063ac9818a4eb",
"body": "There's plenty of Aarch64-specific code, so let's enforce that it's also\n`#[no_std]` compatible.",
"is_bot": false,
"headline": "Also check Aarch64 #[no_std] build on CI (#251)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-20T08:39:13Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "d2411665f0726cd6c09bd6fd98af4af18e3c1778",
"body": null,
"is_bot": false,
"headline": "Version bump (#250)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-06-18T19:19:56Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "6d213a2dc55adba5d9ba4c948955d072812ad97f",
"body": "Even if we don't ship soon, it's good to have this written down.",
"is_bot": false,
"headline": "Populate changelog for the next release (#248)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-18T09:09:58Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "a4e67e1b2bc66361749fdd06c75a5e7f8a7fbedc",
"body": "Expunge unsafe code from load_interleaved and store_interleaved\nimplementations on x86 and WASM.\n\nNEON is implemented via a call to an intrinsic, so it can't be made any\nsafer.",
"is_bot": false,
"headline": "Safer load/store_interleaved (#245)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-17T17:13:00Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "e76b820154dc09f41bca8302670424d8ca079219",
"body": "The README states\n\n> Please feel free to add your name to the\n[AUTHORS](https://github.com/linebender/fearless_simd/blob/main/AUTHORS)\nfile in any substantive pull request.\n\nLooking at #248 I'd say this bar is met.\n\nI did not sign a CLA with copyright assignment for this repository, so\nI'm still the copyright holder, satisfying the conditions in\nhttps://github.com/linebender/fearless_simd/pull/246#issuecomment-4728907579",
"is_bot": false,
"headline": "Add myself to AUTHORS file (#249)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-17T12:05:20Z",
"body_truncated": false,
"is_coding_agent": false
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{
"oid": "822a6001a518039ac5b3be6e4dbb46f75ad73b73",
"body": "I figured it's best to put it directly in the doc comment instead of\nexplaining in a PR or on Zulip.\n\nThanks for the detailed reviews!",
"is_bot": false,
"headline": "Better explain the motivation for bytemuck-at-home (#247)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-17T12:03:51Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "14511ce8eb9ae990425144a90acf6693187c3f12",
"body": "This reverts commit 4f885d94ea27085339a94ff3dafe69aaea6d9f4b\n\nas requested in\nhttps://github.com/linebender/fearless_simd/pull/242#issuecomment-4725028210",
"is_bot": false,
"headline": "Revert \"Add top 5 uncredited contributors to AUTHORS (#242)\" (#246)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-17T10:23:41Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "742fec82965763d86e1cfe2b4172be4bbc60707d",
"body": "…244)\n\nFollow-up to https://github.com/linebender/fearless_simd/pull/236\n\nDidn't even need to extend `kernel!` to support const generics in the\nend.\n\nThe only remaining `unsafe` is now in `load/store_interleaved` which can\nbe eliminated on x86 and WASM but not NEON. That's addressed separately\nin https://github.com/linebender/fearless_simd/pull/245\n\nFixes #124",
"is_bot": false,
"headline": "Remove `unsafe` from generated helpers and const-generic functions (#…",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-17T01:25:03Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "6d9f36f33c7035347b3c31c6e783c8d4c3644d2b",
"body": "They've grown to be more than just 'bytemuck at home'",
"is_bot": false,
"headline": "Document the motivation for custom transmute wrappers (#243)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-16T20:31:23Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "222ca4414d1608316693564b89ec6b7f207678aa",
"body": "Uses the `kernel!` macro added in\nhttps://github.com/linebender/fearless_simd/pull/214 to eliminate most\nof the `unsafe` in calls to intrinsics.\n\nThis is a proof-of-concept to evaluate the impact on performance,\ncompile time, etc. It is not intended to be merged as-is.",
"is_bot": false,
"headline": "Remove unsafe from generated calls to intrinsics (#236)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-16T20:29:02Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "4f885d94ea27085339a94ff3dafe69aaea6d9f4b",
"body": "The README says\n\n> Please feel free to add your name to the\n[AUTHORS](https://github.com/linebender/fearless_simd/blob/main/AUTHORS)\nfile in any substantive pull request.\n\nBut it seems everyone just ignored it.",
"is_bot": false,
"headline": "Add top 5 uncredited contributors to AUTHORS (#242)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-16T20:20:21Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "d818fe43d9e02f6c9abcfd18ad5e30d8b5dc643e",
"body": "The old version is no longer available so switch to this new version.",
"is_bot": false,
"headline": "Download Intel SDE from Github Releases mirror to fix CI (#241)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-13T09:33:05Z",
"body_truncated": false,
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},
{
"oid": "e256795468ec96951f26e6a4a1c56c668ea762e0",
"body": "…#240)\n\nrustfmt treats macros called like `kernel!( ... )` as potentially\ncontaining Rust code and tries to format them, but `kernel!{ ... }` is\ntreated as opaque.\n\nUse the auto-formattable form in all examples so that rustfmt doesn't\nbreak for crate users.",
"is_bot": false,
"headline": "Rewrite kernel! macro examples in a way that is amenable to rustfmt (…",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-06-02T09:25:19Z",
"body_truncated": false,
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},
{
"oid": "a01002e74486e9c7856b8a5a431ee00f37bc5fec",
"body": "Mirrors #232 but for stores\n\nPerformance is unchanged or potentially improved: the old codegen\nemitted `ptr::copy_nonoverlapping` which lowered into a `memcpy` in the\nLLVM IR, while this approach lowers into an unaligned store directly,\nwhich is the same thing as platform-specific SIMD instructions lower to.\n(Yes, platform-specific SIMD intrinsics lower into a generic op!)",
"is_bot": false,
"headline": "Make SIMD stores safe (#238)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-29T17:07:25Z",
"body_truncated": false,
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{
"oid": "1a8234971326662da40e2ffd122459ca23cfc40a",
"body": "No longer needed on Rust 1.87 and later.\n\nThe current version is sound because it is a function and not a macro,\nso this is not a security fix, just eases review.",
"is_bot": false,
"headline": "Drop a needless `unsafe` block from vectorize() impls (#239)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-28T20:11:25Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "650815d125ef1e7897dc8189bf7c45af423d333e",
"body": "Follow-up to #233 which did this for x86\n\nLeaves `vld4q_*` untouched because those are deinterleaving loads that\ngenuinely need an intrinsic.",
"is_bot": false,
"headline": "Replace remaining NEON unsafe loads with checked_transmute_copy (#237)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-27T20:23:37Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "0d13b0af5e06e9a64b26c948ad818be97cc27f0b",
"body": "Stacked on top of #234\n\nreimplements bytemuck::cast/cast_mut but more clearly zero-cost and\nfailing at build time rather than at runtime\n\nthen uses those functions to expunge the remaining unchecked `transmute`\ncalls\n\nand bans unchecked transmute via clippy",
"is_bot": false,
"headline": "Implement safe reference casts (#235)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-27T10:32:11Z",
"body_truncated": false,
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{
"oid": "fbc97daca3266e8c33dc22419a4e5219924c6a0e",
"body": "A big safety win - a lot less bespoke `unsafe` to worry about. \n\nNo difference in codegen in spot-checked assembly.\n\n### Why not wrap `transmute` instead of using `transmute_copy`?\n\nIt's not possible to create a generic wrapper for by-value transmutes.\nrustc rejects it because it cannot prove they h\n[…]\nransmute in terms of `transmute_copy`:\nhttps://github.com/Lokathor/bytemuck/blob/164cedda0eae131bc6cb67902599f4ec253642ca/src/lib.rs#L126\n\nSo we are on a well-trodden path for the optimizer, at least.",
"is_bot": false,
"headline": "Replace by-value transmutes with checked_transmute_copy (#234)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-27T07:17:39Z",
"body_truncated": true,
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{
"oid": "13dd530bffdfd1e7d5d48e5e4a3ccc81a5d66114",
"body": "…_copy` (#233)\n\nOnly affects one function.\n\nAs per #185 we don't need explicit load intrinsics, LLVM is better at\nselecting the right load for the job from a generic load instruction.\n\nThe generated assembly is identical before and after. This is not a\nperformance win but a safety win.",
"is_bot": false,
"headline": "Remove the last unsafe loads and replace them with `checked_transmute…",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-26T19:41:27Z",
"body_truncated": false,
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{
"oid": "6d59cb39d0f58c0e56e602764dea1c3080ee6305",
"body": "\"we have `bytemuck` at home\"\n\nThese are the `transmute_copy()` safety improvements from #231 taken one\nstep further: on top of checking the sizes match at compile time and\nthat both types are `Copy`, we also add a marker trait to types that are\nsafe to transmute and require it in `checked_transmute_\n[…]\n because they may introduce padding depending on the\n`T`. So the amount of code it saves us is minimal.\n\nRebasing #231 on top of this would be hellish, but a merge commit\nprobably wouldn't be too bad.",
"is_bot": false,
"headline": "Safe transmute_copy() (#232)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-25T14:51:39Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "3195be0521ae3e733a3f650478409c0ce02ddaaf",
"body": "This brings mask type documentation in line with the integer and float\nvectors.",
"is_bot": false,
"headline": "Nicer docs for mask types (#230)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-24T15:20:56Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "89f755f2458fd100819953f367918cc602ed4f33",
"body": "Follow-up to #218\n\nAdds to/from_bitmask, mirroring `std::simd`. This required substantial\ncomplexity, and is covered with exhaustive roundtrip tests for smaller\nsizes and tests for interesting patterns on larger sizes.\n\nAlso re-introduces APIs to get/set a single bit. The API mirrors\n`std::simd` ins\n[…]\nen to\nerr on the side of not forcing stack spills. Reasonable people can\ndisagree about the trade-offs here, but I don't think it really matters\nsince this function is not performance-critical anyway.",
"is_bot": false,
"headline": "Add more mask methods mirroring `std::simd` API (#226)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-24T10:49:31Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "3f17d69958aa053aaaae8f644feb383496f99600",
"body": "`cargo nextest`'s claim to fame is faster performance in some cases.\nHowever, its model of one process per test maps especially poorly to\n`fearless_simd` test structure.\n\nWe have over a thousand very small tests, so process spawning overhead\nreally adds up. Locally `cargo test` is 4x faster than `ca\n[…]\nere it starts up a whole new instance of `wasmtime` for every single\ntest, which adds up to over 3 minutes to run the test suite even on my\nbeefy machine. `cargo test` completes in just a few seconds.",
"is_bot": false,
"headline": "Remove `nextest` to speed up CI (#227)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-23T18:04:47Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "a0654715e54fad30f78d1efd0d3b39987692f95f",
"body": "x86 and AArch64 have instructions to calculate fast approximate\nreciprocals, and these can speed up some algorithms quite nicely (e.g.\nsprinkling this in Vello's `flatten_simd.rs` results in -4% flattening\ntimings for GhostScript Tiger (actually landing that there requires a\nbit of thought whether t\n[…]\nerformance as `rcp`, and extends\nsupport to `f64`.\n\nIn any case, this method does the simplest thing of just exposing the\ncheapest hardware estimate, similar to e.g. Highway's\n`ApproximateReciprocal`.",
"is_bot": false,
"headline": "Add fast approximate reciprocal methods for float vectors (#204)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-05-23T11:56:49Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "a1f5cd2bca2f64a5feefd3448bad72830700653c",
"body": "This is necessary for eventual AVX-512 support. Part of #179.\n\nThis does not add any AVX-512 stuff yet, just lays the groundwork by\nabstracting away the internal representation.\n\nContrary to what the description of #196 said, we don't actually need\ni64 vectors in the public API so long as we're not \n[…]\ny to add more APIs if there's desire\nand review capacity for them.\n\nA port of vello to this API can be found [here](\nhttps://github.com/linebender/vello/compare/main...Shnatsel:opaque-masks?expand=1).",
"is_bot": false,
"headline": "Make mask types opaque (#218)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-23T10:49:12Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "12523a65c9cf60fcaeb36d36474ba892feed7592",
"body": "Follow-up from #221",
"is_bot": false,
"headline": "Fix some doc links (#224)",
"author_name": "Daniel McNab",
"author_login": "DJMcNab",
"committed_at": "2026-05-21T15:24:02Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "2a9fbf7a9b7f72737d033bc8c86c7c38377f0b7a",
"body": "`macos-latest` is ARM, and runs x86 binaries through rosetta. We need to\nspecify the Intel runner explicitly to get x86 hardware.\n\nMotivation:\nhttps://github.com/linebender/fearless_simd/pull/218#issuecomment-4482607401\n\nOur test suite is now so thorough that it caught a Rosetta bug\n:sunglasses:",
"is_bot": false,
"headline": "Run x86 apple job on x86 hardware (#219)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-21T08:02:37Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "cd2828da41ee3b10765090e364753283ad518d34",
"body": "The vast majority of our operations accept fixed-size inputs with the\nlengths encoded in type system, so they are pretty hard to mess up. We\nalso have Address Sanitizer on CI verifying that all the raw intrinsics\nactually stick to those sizes.\n\nThe only exception are from_slice/store_slice APIs, which accept\nvariable-length slices. This PR adds tests verifying that slices that\nare too short are correctly rejected.",
"is_bot": false,
"headline": "Add slice op soundness tests (#220)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-20T20:10:58Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "72c1e81ca421f34f813748826a08631792fb62ca",
"body": "Document how to run `cargo rdme` in the lib.rs files.\nAlso change the base level now that we use level 1 headings in our docs",
"is_bot": false,
"headline": "Make our READMEs consistent (#225)",
"author_name": "Daniel McNab",
"author_login": "DJMcNab",
"committed_at": "2026-05-20T16:00:05Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "27424309ac949ea387ee3dd25ca9d92e2a2d440d",
"body": "As requested in\nhttps://github.com/linebender/fearless_simd/pull/216#pullrequestreview-4326396042",
"is_bot": false,
"headline": "Improve docs for SIMD level tokens (#222)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-20T12:52:24Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "a6ed0e464c938f1d5dfa5574aa402f82adfeb188",
"body": "Remove the wrappers for intrinsics inherited from `pulp` now that #214\nprovides a way to access intrinsics without us having to wrap every\nsingle one.\n\nPart of https://github.com/linebender/fearless_simd/issues/166\n\nSupersedes #209",
"is_bot": false,
"headline": "Rip out `core::arch` wrappers (#216)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-19T22:12:49Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "4a1adc16917e6efb2dd4ec77facccdb49cc1efa3",
"body": null,
"is_bot": false,
"headline": "Mention access to platform-specific intrinsics in the README (#221)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-19T15:03:32Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "bcbc4973202f12ddabdb769591af25fbcac73cac",
"body": "An even simpler implementation of the concept from #212, thanks to the\nreview feedback by @DJMcNab\n\nAlternative to https://github.com/linebender/fearless_simd/pull/108 and\nhttps://github.com/linebender/fearless_simd/pull/196\n\nPart of #166",
"is_bot": false,
"headline": "Even KISS-er access to intrinsics (#214)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-19T11:17:47Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "5c29a115f10d29ad2015b82941418935a8d1af36",
"body": "…(#215)\n\nFixes https://github.com/linebender/fearless_simd/issues/205\n\nThis `todo!()` was never actually emitted into fearless_simd code\nbecause all implementations override it and don't use the generic\nfallback. This is just a minor cleanup to prevent future misuse.",
"is_bot": false,
"headline": "Make misuse fail in the generator instead of emitting todo!() macros …",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-18T10:18:44Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "34176208124393bc895d8e7815280b54cc61f015",
"body": "Now that docs.rs [only builds one target by\ndefault](https://blog.rust-lang.org/2026/04/04/docsrs-only-default-targets/),\nwe need to explicitly specify the list of targets to show NEON and WASM\ndocumentation on docs.rs.\n\nThis also enables the `simd128` target feature on docs.rs, which might\nnot matc\n[…]\nocal build, but whichever option we pick\n(enabling simd128 or only showing fallback or having no wasm docs at\nall) is going to be confusing in some way, so it's a \"pick your poison\"\nkind of situation.",
"is_bot": false,
"headline": "Show NEON and WASM docs on docs.rs (#213)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-18T09:15:05Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "4380361ec9fce11323129f50edf203a41cd5f211",
"body": "See also the discussion in\nhttps://xi.zulipchat.com/#narrow/channel/197075-vello/topic/.E2.9C.94.20Making.20traits.20in.20fearless_simd.20require.20.60Seal.60/near/595462829.\nWe don't intend these to be impelemented externally, so mark as sealed.\nThis way, adding new methods isn't a breaking change anymore.\n\n---------\n\nCo-authored-by: Sergey \"Shnatsel\" Davidoff <shnatsel@gmail.com>",
"is_bot": false,
"headline": "Mark crate types as sealed (#211)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-05-16T10:00:10Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "0e8e242aaa8031cdc9708f99334e8998d4725916",
"body": "#208 is not breaking because the restrictions already existed, we just\nforgot to add them everywhere.\n\nI realized that _in theory_ #207 would be breaking because while the\n`Simd` trait requires `Seal`, `SimdInt` and `SimdBase` currently do not,\nI think that's an oversight. However, those traits are not intended to\nbe implemented manually anyway, so let's just fix that in a follow-up.\n\n---------\n\nCo-authored-by: Sergey \"Shnatsel\" Davidoff <shnatsel@gmail.com>",
"is_bot": false,
"headline": "Prepare v0.4.1 release (#210)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-05-16T09:45:53Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "097ec7d735780d839499a9c3128aa09c6c4c3cb8",
"body": "This shouldn't be an issue on real hardware, but certain emulators with\nfeature combinations that never existed in silicon might complain.\nTighten things up just to be sure.\n\n---------\n\nCo-authored-by: Laurenz Stampfl <47084093+LaurenzV@users.noreply.github.com>",
"is_bot": false,
"headline": "Consistently use the v2 and v3 x86_64 instruction sets everywhere (#208)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-05-02T18:02:08Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "3a11a8fbdb050a3879ff31a956ed86daf20cbe51",
"body": "Follow up to #206\n\n@LaurenzV noted that deinterleaving could be optimized the same way. \n\nEmitting the proper shuffle is more involved than for zip, but it's\nalready implemented in `handle_unzip()`, so I've simply split it into a\nhelper function and reused it.\n\nThis code has good test coverage and all tests pass.\n\n---------\n\nCo-authored-by: Claude <noreply@anthropic.com>",
"is_bot": false,
"headline": "Optimize `deinterleave()` for AVX2 (#207)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-04-22T13:55:16Z",
"body_truncated": false,
"is_coding_agent": true
},
{
"oid": "8fcafea970000a3122467afc7ec51c24a0387482",
"body": "Adds a new method with API matching std::simd's\n[`interleave`](https://doc.rust-lang.org/stable/std/simd/struct.Simd.html#method.interleave)\nmethod.\n\nThe primary motivation is **performance:** on AVX2, `zip_low` followed\nby `zip_high` requires 6 instructions, while a combined `interleave`\nfunction o\n[…]\ns 4.5 for the\ninitial commit and 4.6 for the rest. I have manually reviewed the code\nand take full responsibility for it.\n\n---------\n\nCo-authored-by: Laurenz Stampfl <laurenz.stampfl+github@gmail.com>",
"is_bot": false,
"headline": "Add `interleave` method (#206)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-04-18T15:59:05Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "3f4489389940b7c3c6ee1847a2d007a22494eeff",
"body": "Update exhaustive tests to roundtrip precise conversions on all values;\nout-of-range values are intentionally implementation-defined in the\nnon-precise variants.\n\nAdd tests for the non-precise variants that correctly ignore the\nout-of-range values.\n\nFixes #202\n\n---------\n\nCo-authored-by: Tom Churchman <thomas@churchman.nl>",
"is_bot": false,
"headline": "Fix conversion roundtrip tests (#203)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-22T17:30:37Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "c3632abfdbe3357ddb68496f9c4dd001ff13e218",
"body": null,
"is_bot": false,
"headline": "Prepare v0.4.0 release (#200)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-02-13T19:23:43Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "05f68a43dd3a815d4e7247f6cfacfec739d3fb50",
"body": "Using `vectorize()` as opposed to directly calling functions annotated\n`#[inline(always)]` is meant to introduce an inlining barrier and make\nthe compiler make inlining decisions. Therefore putting `#[inline]` on\nit is rather pointless: if I wanted aggressive inlining, I wouldn't be\ncalling `vectori\n[…]\ning. This alone doesn't fix it, but seems like a\nsensible first step.~~ It's not clear if over-zealous inlining was a\ncause of the regression, there are other factors. I'll re-measure once\n#185 lands.",
"is_bot": false,
"headline": "Less overzealous inlining (#183)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-12T21:21:24Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "ba3ddfa518f6a4209eb9c791e5606e4037b7cf7d",
"body": "run `apt-get update` before installing qemu because apparently the\npackage lists can be outdated, causing the job to fail:\nhttps://github.com/linebender/fearless_simd/actions/runs/21815601288/job/62936485469\n\nplus other robustness improvements: `apt-get` instead of `apt` to get a\nstable command-line interface (apt warns its interface isn't stable and\nit shouldn't be used from shell scripts) and `-y` to install/update any\nrequired dependencies.",
"is_bot": false,
"headline": "Fix Aarch64 QEMU CI job (#199)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-11T19:06:43Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "f9ff199bd50bfc198943f52537be44a1d47fe963",
"body": "The newly added tests were generated by Claude Code with Opus 4.5\nbackend, since there's way too many of them to hand-write.\n\nIn the future we might want to add a more rigorous automatic generation\nof test cases for various vector sizes using an approach along the lines\nof `fearless_simd_gen`, but t\n[…]\nhe 512-bit test file contains more tests than the 256-bit one because\nmod.rs already includes some handwritten tests for 256-bit vectors, so\nthey don't have to be duplicated in the 256-bit tests file.",
"is_bot": false,
"headline": "Better test coverage for 256-bit and 512-bit vectors (#192)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-09T07:05:39Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "56da100b65a90c0bf40a2d3819272a28e416db55",
"body": "Same as #197 but for ARM\n\nPart of https://github.com/linebender/fearless_simd/issues/124",
"is_bot": false,
"headline": "Add Aarch64 QEMU job to CI (#198)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-06T18:05:46Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "264ec78df5f0e68943505510531539c913b171ca",
"body": "Runs tests in Intel Software Development Emulator, like `stdarch` does\nalready, to verify we don't accidentally use an AVX2 instruction on\nSSE4.2 level or some such.\n\nPart of #124\n\nSome NEON instructions are only available on some cores, and have to\nchecked for at runtime via CPU features, but this \n[…]\nd QEMU for the rest, but QEMU does not support\nAVX-512.\n\n---------\n\nCo-authored-by: valadaptive <79560998+valadaptive@users.noreply.github.com>\nCo-authored-by: valadaptive <valadaptive@protonmail.com>",
"is_bot": false,
"headline": "Run CI tests in Intel SDE with all feature levels (#197)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-06T07:21:46Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "d930caf10852ad25f03a98f067e2e925c66e0329",
"body": "Without a tool like miri or Address Sanitizer memory safety bugs would\ngo undetected.\n\nWe can't run intrinsic-heavy code under miri, but we can and should run\nit under Address Sanitizer on CI.\n\n[Address Sanitizer\ndocumentation](https://doc.rust-lang.org/beta/unstable-book/compiler-flags/sanitizer.ht\n[…]\nuld also flag reads from uninitialized memory, and there's a\ndifferent dedicated sanitizer for it we could enable, but `rg uninit`\nshows zero uses of uninit memory in fearless_simd so it's not needed.",
"is_bot": false,
"headline": "Run tests under Address Sanitizer on CI (#193)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-03T19:10:14Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "dfda2a8f1db595fd2bd655b3b774b77e8a77434e",
"body": "More info on x86 architecture levels:\nhttps://en.wikipedia.org/wiki/X86-64#Microarchitecture_levels\n\nI've verified that this allows using the AVX2 level on the earliest CPUs\nwith AVX2 from Intel and AMD:\n\n`rustc --print=cfg --target x86_64-unknown-linux-gnu -C\ntarget-cpu=haswell` // earliest Intel A\n[…]\n188\n\nThis does make `Level::new()` marginally more expensive but the README\n[already\ninstructs](https://github.com/linebender/fearless_simd/tree/main/fearless_simd)\nusers to construct it exactly once.",
"is_bot": false,
"headline": "Use x86-64-v3 architecture features for AVX2 level (#188)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-02-03T08:21:41Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "bbb430b6f5e201fe77f9a0e7d0aeb507214ef917",
"body": "Depends on #159. Working on this is what sent me down that rabbit hole\nin the first place.\n\nProgress towards #29, implementing the first lane-shuffling operations.\n\nThis PR adds an operation that concatenates two vectors and then takes a\nwindow of the concatenation. In other words, it takes two `n`-\n[…]\n It's hard to find a good name\nfor this operation. x86's \"alignr\" makes me think of memory alignment,\nand ARM's \"vext\" (\"vector extend\") sounds like you're just combining two\nvectors into a wider one.",
"is_bot": false,
"headline": "Add a \"slide\" operation (like x86's `alignr` and ARM's `vext`) (#164)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2026-01-26T22:51:23Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "280cc283f870ed5f53e7391f6e2de44e86d150cc",
"body": null,
"is_bot": false,
"headline": "Bump lint set to v8 (#191)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-01-25T17:30:36Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "6f70c9d724028d0a063e5fa2b0ed7de0d7c31ca1",
"body": "This fixes the remainder of `clippy::cast_possible_wrap` warnings on\nx86.\n\nVery similarly to https://github.com/linebender/fearless_simd/pull/186,\nexplicitly reinterpret these bit patterns as signed (i.e., this again is\nexplicitly a no-op at the instruction-level, but effectively checks bit\nwidth remains the same). Also uses `cast_signed` for splatting on x86,\nwhich just takes the bit pattern as a signed numeric type for\nbroadcasting.",
"is_bot": false,
"headline": "Explicitly `cast_signed` some masks and sign bits on x86 (#190)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-01-25T16:46:14Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "586b4d7727ad3e3426afdd9160ef154bcaa5057c",
"body": "Missed this in https://github.com/linebender/fearless_simd/pull/186.",
"is_bot": false,
"headline": "One more explicit `shift` to signed casting on x86 (#189)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-01-25T16:09:16Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "bf99e2161befb96ec4579eb5cb2114baafd53755",
"body": "This is an interesting one! The remaining performance gap in\nhttps://github.com/QuState/PhastFT/pull/58 seems to come from subpar\nperformance when loading constants.\n\nI noticed that in Rust's `stdarch`, which defines all the SIMD\nintrinsics, the x86 load/store intrinsics lower to raw memory operatio\n[…]\nting in much fewer optimization\nopportunities and much worse codegen. If this is the case, we should\njust use memory operations directly. This also simplifies the code that\nwe generate by quite a bit.",
"is_bot": false,
"headline": "Don't use load/store intrinsics (#185)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2026-01-24T20:20:49Z",
"body_truncated": true,
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},
{
"oid": "d969e5f8a50d322a2cc217c249801209dd25ff2e",
"body": null,
"is_bot": false,
"headline": "Add missing changelog link (#187)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-01-24T10:24:11Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "fa2c255ab9339377b2b1fd98113774b128f12e6c",
"body": "This is in preparation for bumping the lint set, which will include\n`clippy::cast_possible_wrap`.\n\nFor the fallback code using `Shl`, we don't need to cast as `Shl` is\nimplemented for all scalar types as shift argument. Casting versus\ncalling directly compile to the same thing:\nhttps://godbolt.org/z\n[…]\nbvYdjd.\n\nFor the x86 code, we cast from `u32` to `i32`, so we can use\n`u32::cast_signed` for that, which explicitly stays at the same bit\nwidth and has the sign behavior that's probably expected here.",
"is_bot": false,
"headline": "Simplify some shift casting (#186)",
"author_name": "Tom Churchman",
"author_login": "tomcur",
"committed_at": "2026-01-24T10:10:00Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "744661d92d0fe807d577f0a0987213c62668e097",
"body": "I *meant* to use this method to implement the `from_slice` method, but\napparently used `load_array` instead.",
"is_bot": false,
"headline": "Use `load_array_ref` to implement `from_slice` (#184)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2026-01-23T02:52:27Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "ccf476392b16ef64840486cff0e989c8cffe3c77",
"body": "Following up on\nhttps://github.com/linebender/fearless_simd/pull/181#discussion_r2713723878",
"is_bot": false,
"headline": "Clarify doc comment on `from_slice`/`store_slice` (#182)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2026-01-21T18:39:43Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "4d915a44793e03c786b7cc0faf256080ec732925",
"body": "As per title, by having this, we don't have to store them back using\n`copy_from_slice` (which may or may not optimize into vector store\ninstructions) but can use methods that use the corresponding intrinsics\nunder the hood.",
"is_bot": false,
"headline": "Add methods for storing vectors back to memory (#181)",
"author_name": "Laurenz Stampfl",
"author_login": "LaurenzV",
"committed_at": "2026-01-18T14:39:09Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "c249157539c9aa66416c376b3ffe0454ac308800",
"body": "This PR is stacked on top of #177.\n\nAfter adding the `Level` trait as an abstraction, we can use it to merge\nthe AVX2 and SSE4.2 implementations into a single module. Most of the\nlogic is the same, except for a few functions which need to do something\ndifferent if AVX2 is supported. This gets rid of a lot of duplicate\ncode.",
"is_bot": false,
"headline": "Consolidate AVX2 and SSE4.2 generation into one module (#178)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-20T10:41:37Z",
"body_truncated": false,
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},
{
"oid": "0bfdf901d2ac89e2a627205f238328fdaeaf6176",
"body": "Resolves #153.\n\nAs noted in that issue, the `simd_from` method currently takes the SIMD\ntoken as the second argument. The `from_[...]` methods on `SimdBase`, on\nthe other hand, take it as the first argument.\n\nThis PR changes the `simd_from` signature to take the SIMD token as the\nfirst argument for \n[…]\nen as the second argument since the first one must be\n`self`. I think most people will be calling `simd_into` in method form\ninstead of explicitly passing `self`, so I don't think that's a huge\nissue.",
"is_bot": false,
"headline": "Change `simd_from` argument order to match other methods (#180)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-20T10:22:56Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "54f9d4245cfaf0a41eae11613ac5f07b45fb11cb",
"body": "This PR is stacked on top of #176, and adds a `Level` trait to\nfearless_simd_gen. The different code generation backends (Neon, AVX2,\netc) all implement this trait.\n\nThe various level-specific code generation functions are now mostly\ntrait methods. The `Level` trait implements some default trait methods,\nwhich call into the level-specific ones as necessary. Some of the code\nthat was previously level-specific is actually identical between all\nimplementations, and was moved onto the `Level` trait.",
"is_bot": false,
"headline": "Add `Level` trait in codegen to consolidate the generation logic (#177)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-19T23:40:06Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "c62dc7482c4f3b860d39b151bfcb99c3c39ba29a",
"body": "The first half of a codegen rework. This part includes the smaller\nchanges: using helper methods in more places (`generic_op_name`,\n`VecType::reinterpret`, the new `VecType::cast`), moving some methods\nacross types so we can pass in fewer arguments, removing old TODO\ncomments, etc.\n\nThere are no sub\n[…]\nal changes, but for consistency's sake\nand to make it easier to reuse code later, I added a core_arch token for\nWASM SIMD128 and used it in the `WasmSimd128` level, which matches all\nthe other levels.",
"is_bot": false,
"headline": "More codegen cleanups (#176)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-18T21:19:29Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "b2231664d5512e2806e1d2f572ed73504b0016fd",
"body": "Resolves #169. Depends on #159, which touches much of the same code.\n\nThis implements what I described in #169: making the `Element` type on\n`SimdBase` an associated type instead of a type parameter. This encodes\nthe property that each `SimdBase` implementor can have only one element\ntype.\n\nThis is \n[…]\nact, even for the code in fearless_simd itself. Some trait signatures\nneed to be adjusted, but they've gotten simpler. The main impact is that\nit's easier to write code that's generic over `SimdBase`.",
"is_bot": false,
"headline": "Make `Element` an associated type on `SimdBase` (#170)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-17T23:06:12Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "dbc98634860d88db73af4c2783a992f24540180f",
"body": "Implements some of what was discussed in\nhttps://github.com/linebender/fearless_simd/issues/118.\n\nIn some cases, you might have a scalarized version of your algorithm\nthat runs faster than the `Fallback` SIMD version. It might be useful to\nbe able to fall back to it instead, by checking if SIMD is u\n[…]\necks are getting a bit unwieldy. In the future, it may be\nworth using something like\n[`cfg_aliases`](https://github.com/katharostech/cfg_aliases), although\nthat would require introducing a `build.rs`.",
"is_bot": false,
"headline": "Add `Level::is_fallback()` method (#168)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-17T22:39:48Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "919b7d2b3a12f23ee52e3825441de56e32fb2e15",
"body": "Resolves https://github.com/linebender/fearless_simd/issues/150.\n\nIn #150, I began wondering if this would involve fully switching the\nvector types over to being associated types on the `Simd` trait. For\ntrait coherence reasons, it turns out we don't want to do that. As such,\nthere *is* a meaningful\n[…]\nR](https://github.com/valadaptive/vello/tree/fearless-simd-bench-pre-native-vectors),\nand [this branch, which includes this\nPR](https://github.com/valadaptive/vello/tree/fearless-simd-native-vectors).",
"is_bot": false,
"headline": "Use native vector types to back SIMD types (#159)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-17T22:13:41Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "5999991189327435c5f16d6a609636b3f63b7ab1",
"body": "The extra work necessary to emulate saturating behavior on x86 is in\nfact slowing things down. This PR separates the float-to-int conversion\nmethods into non-precise and precise variants. The non-precise ones can\nreturn implementation-defined results if any values are NaN or out of\nrange for the des\n[…]\nnon-precise/precise operations in the\nint-to-float direction as well. Out-of-range values are simply rounded\nto the nearest representable value, and I think that's consistent across\nall architectures.",
"is_bot": false,
"headline": "Separate precise/non-precise float-to-int conversions (#167)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-14T17:07:13Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "d6fae89cf04991b5079ee40caa93b30373ca7af4",
"body": "These weren't marked as `#[inline]`, but previously seemed to be getting\ninlined anyway. After updating rustc and fearless_simd, some inlining\nheuristic must have changed, because they stopped getting inlined and\neverything became much slower.",
"is_bot": false,
"headline": "Inline `float_from` and `truncate_from` (#165)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-13T17:22:04Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "425c6acce327f1ac99626688f5af085c7375e916",
"body": "This is a breaking change, so it'd be good to mention in the changelog.",
"is_bot": false,
"headline": "Add #158 to changelog (#160)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-10T09:08:46Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "bcdc8b390689076be4349d64e4686e52e3b3c384",
"body": "`std::simd` and scalar operations on `f32`/`f64` all call this `mul_add`\ninstead of `madd`. So does `wide` which recently aligned its API with\nstd::simd and then shipped version 1.0.\n\nThe names of the intrinsics are left intact to match their std and C\ncounterparts.\n\nThis aligns the function naming \n[…]\nof the ecosystem, which\ncan only be a good thing.\n\n-----\n\nIt would be nice to add `#[doc(alias = \"madd\")]` but it's tricky since\nthis code is autogenerated this is tricky, so I left it out of this PR.",
"is_bot": false,
"headline": "Rename madd/msub to mul_add/mul_sub for consistency with std (#158)",
"author_name": "Sergey \"Shnatsel\" Davidoff",
"author_login": "Shnatsel",
"committed_at": "2025-12-08T16:00:37Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "e1803d191c6ae855a4dc56d047f0228a4141d39c",
"body": "For symmetry with the existing vectored shift right operation. I took\nthe opportunity to clean up the codegen a bit, moving the x86\nimplementation entirely into `mk_avx2` since SSE4.2 just uses the\nfallback.",
"is_bot": false,
"headline": "Add a vectored shift left operation (#155)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-06T11:56:04Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "bbcd524702daa9e5cd52331ad7d05c245fd752bb",
"body": "Instead of exporting functions from `OpSig` to generate the arguments\nlist and return type for each method separately, consolidate everything\ninto methods that return the entire method signature at once.\n\nThe only change to the generated code is in the parameter names of the\ngeneric split/combine-based methods--they now match the parameter names\nof the `Simd` trait methods.\n\nI plan to add methods that use const generics as part of the swizzle\nwork, and this is a prerequisite.",
"is_bot": false,
"headline": "Clean up method signature codegen (#156)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-06T10:51:19Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "6946d200bbd664d6e1474315aaaf304385357613",
"body": "Now that we've moved towards a more operation-centric design for the\ncodegen, we can more easily add documentation for each operation.\n\nI've updated the codegen to add documentation strings for every\noperation, as defined on both the `Simd` trait and the vector types.\nThere's some basic templating to deal with the argument names being\ndifferent between the two.\n\nI've also added documentation for each vector type, and filled in some\nbasic docs for the manually-defined traits.",
"is_bot": false,
"headline": "Generate documentation for operations and vector types (#154)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-05T15:32:58Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "7e1355d7e45068ce13ba8debccdb63815afad867",
"body": "Resolves #139.\n\nThese are implemented using whatever intrinsics seem to be fastest.\n\nOn x86, I use `_mm_movemask`, which should be fastest for floating-point\noperations at least. For AVX2, LLVM can optimize this to\n`vtestps`/`vtestpd`. This checks the high bits for 8-bit, 32-bit, and\n64-bit types. F\n[…]\ne same\nresult as `!any_false`.\n> The `select` operation also has unspecified behavior for mask elements\nthat are not all zeroes or all ones. That behavior may not match the\nbehavior of this operation.",
"is_bot": false,
"headline": "Add mask reduction operations (#141)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-05T13:41:53Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "674e013d9656cdeff8abe8d0544d65d4e80e95f6",
"body": "Depends on #148.\n\nThis PR intertwines codegen and API changes, unfortunately. Some of the\ncodegen cleanups depend on it.\n\nAll the inherent impl methods on individual SIMD types are now gone\nentirely. Most of them were previously already accessible via the\n`core::ops` traits, `SimdBase`/`SimdInt`/`Si\n[…]\nn for adding documentation generation. I want to make it as\noperation-centric as possible, moving op-specific special cases out of\neach module generation method and into the operation metadata itself.",
"is_bot": false,
"headline": "Further tidy up codegen and somewhat rework the API (#149)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-12-05T09:00:01Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "45ae1187499d87402fc56d4fe1934fef68021f72",
"body": "I keep forgetting to add changelog entries to my PRs after they get\napproved. (It's a hassle to add changelog entries any earlier, because\nit leads to merge conflicts.) This should cover all of them, at least\nthe ones that affect user-facing functionality.",
"is_bot": false,
"headline": "Add all of my PRs to the changelog (#146)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-29T19:41:40Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "ea7bfc3453447f41e96e0ebd55dbf49a7a5372b4",
"body": "I'm trying to move towards defining everything about a SIMD operation in\none place. In order to make every operation maximally descriptive, I've\nmade some changes (in order):\n\n- I've changed the `OpSig` enum to have struct variants instead of tuple\nvariants, and standardized the naming of those vari\n[…]\nhe trait bounds for bitwise operations. These traits\nwere already implemented for every mask type, and I believe their\nomission was unintentional.\n- I've added documentation for every `OpSig` variant.",
"is_bot": false,
"headline": "Clean up the code generation a bit more (#148)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-29T08:54:16Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "314325143f725954014c8eac6d60340e5f0a7143",
"body": "Resolves #142.\n\nThis PR makes use of WASM's new \"relaxed SIMD\" intrinsics if the\ncorresponding target feature is enabled. I opted against making it a new\nSIMD level, since most operations are the exact same and WASM doesn't\nhave runtime feature detection anyway.\n\nThe relevant intrinsics for us are t\n[…]\nmd/pull/136, we can also use\nrelaxed min/max operations for floats.)\n\nIt does mean we need to double our tests; maybe it would be worth adding\na `.cargo/config.toml` to remove some of the boilerplate?",
"is_bot": false,
"headline": "Use WebAssembly's relaxed SIMD intrinsics if available (#143)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-28T21:41:44Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "c146cc72e2814d30dcb44ad586611ca348bd5930",
"body": "Resolves #144. Apparently, we implemented `floor`, but not `ceil` or\n`round` :P\n\nThere are differing opinions on whether `round_ties_even` should be\ncalled just `round`. I agree with Ralith that we should prefer to match\nRust's naming conventions here to avoid any confusion.",
"is_bot": false,
"headline": "Implement `ceil` and `round_ties_even` operations (#145)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-27T15:58:41Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "a6a0c6f48e092ee6e280fb287eead0298705a569",
"body": "Resolves #133. Depends on #134, since I use a helper method I introduced\nin that PR.\n\nIn #133, I brought up the question of what semantics we should use for\nfloating-point minimum and maximum operations. There were many different\noptions available, all with annoying tradeoffs on different\narchitectu\n[…]\nm the short end of\nthe stick when it comes to performance.\n\n[^1]: WebAssembly actually flips the operands so that it returns the\n*second* operand if the *first* is NaN, but we can just flip them back.",
"is_bot": false,
"headline": "Implement new min/max/min_precise/max_precise semantics (#136)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-27T15:45:16Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "829d56fe7aa26f37e8d7efab3b134063fb231047",
"body": "No AVX2-specific implementations yet; I suspect we're too bottlenecked\non memory and shuffle operations for any AVX2 speedups.\n\nThe 32-bit interleave is a 4x4 transpose and is its own inverse, so it\ncan be used to implement interleaved loads and stores as-is.\n\n8-bit and 16-bit interleaved loads and \n[…]\nn additional\nshuffle. This could be avoided if x86 had an instruction that shuffled\n8- or 16-bit elements from two different sources, but it doesn't. This\noperation is not necessarily its own inverse.",
"is_bot": false,
"headline": "Implement all interleaved load/store ops on x86 (#140)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-24T16:56:37Z",
"body_truncated": true,
"is_coding_agent": false
},
{
"oid": "30057642cbd0e61c49a6252174b4cc2d934a9092",
"body": "This PR implements fully-compliant conversions for f32->i32, f32->u32,\ni32->f32, and u32->f32. They are implemented thusly:\n\n- f32 to i32: Check if any operands are not less than 2147483648.0. This\ncatches out-of-range values and NaN, which is not less than any number.\nIf so, clamp the values and al\n[…]\nform-uint32-float-conversion-with-sse).\nIt requires no actual conversion instructions.\n\nI've tested these conversions exhaustively on every 32-bit bit pattern,\nand they all return the correct results.",
"is_bot": false,
"headline": "Implement all float<->int conversions on x86 (#134)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-24T16:47:22Z",
"body_truncated": true,
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},
{
"oid": "92a1debc0699e74e362565f5804820a32ea968c5",
"body": "Forgot to add this before merging #137.",
"is_bot": false,
"headline": "Add `from_fn` to changelog (#138)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-23T18:22:52Z",
"body_truncated": false,
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},
{
"oid": "22dade5212d070cd502b5d8c6c9348e3e519f0df",
"body": "Mostly in `fearless_simd_gen`, but some in `fearless_simd` itself.\nMaking progress on #40. Fingers crossed this passes CI; there's probably\nat least one configuration where I missed a spot.",
"is_bot": false,
"headline": "Fix a bunch of Clippy lints (#135)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-21T20:58:12Z",
"body_truncated": false,
"is_coding_agent": false
},
{
"oid": "1a8ddc4f4759d70ca3423298e4969ef337c617ff",
"body": "Resolves #132. Does what it says on the tin / in the docs.\n\nNot sure how much sense this makes for the mask types, but they already\nhave `from_slice` and `splat`. Maybe that should be a future issue.",
"is_bot": false,
"headline": "Add `SimdBase::from_fn` (#137)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-21T19:37:56Z",
"body_truncated": false,
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},
{
"oid": "ec916db105da50b797d29d9462ba35e301f666a0",
"body": "This was discussed a bit in #122. We were previously omitting\narchitecture-specific tests based on the *host* architecture, which is\nincorrect and prevents cross-compiling tests to run under something like\nqemu.\n\nWe can't access `CARGO_CFG_TARGET_ARCH` at the time that proc macros are\nevaluated, so \n[…]\nre-specific `exclude` functions to add\n`#[ignore]` attributes rather than omitting the tests entirely. This\nmakes it more clear that the tests exist, but are not being run because\nthey don't yet pass.",
"is_bot": false,
"headline": "Build all tests for better cross-compilation (#126)",
"author_name": "valadaptive",
"author_login": "valadaptive",
"committed_at": "2025-11-19T21:38:32Z",
"body_truncated": true,
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}
],
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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"version": "0.52.6",
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],
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"avatar_url": "https://avatars.githubusercontent.com/u/242367?v=4"
},
{
"type": "User",
"login": "Shnatsel",
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{
"type": "User",
"login": "LaurenzV",
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{
"type": "User",
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{
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{
"type": "User",
"login": "DJMcNab",
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"avatar_url": "https://avatars.githubusercontent.com/u/36049421?v=4"
},
{
"type": "User",
"login": "ajakubowicz-canva",
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"avatar_url": "https://avatars.githubusercontent.com/u/163091670?v=4"
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{
"type": "User",
"login": "tomcur",
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"avatar_url": "https://avatars.githubusercontent.com/u/9393486?v=4"
},
{
"type": "User",
"login": "sagudev",
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"avatar_url": "https://avatars.githubusercontent.com/u/16504129?v=4"
},
{
"type": "User",
"login": "no-materials",
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"avatar_url": "https://avatars.githubusercontent.com/u/16938952?v=4"
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],
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"has_precommit_config": false
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"checks": [
{
"name": "Binary-Artifacts",
"score": 10,
"reason": "no binaries found in the repo",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#binary-artifacts"
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{
"name": "Branch-Protection",
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"reason": "branch protection is not maximal on development and all release branches",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#branch-protection"
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{
"name": "CI-Tests",
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"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#ci-tests"
},
{
"name": "CII-Best-Practices",
"score": 0,
"reason": "no effort to earn an OpenSSF best practices badge detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#cii-best-practices"
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{
"name": "Code-Review",
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},
{
"name": "Contributors",
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"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#contributors"
},
{
"name": "Dangerous-Workflow",
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"reason": "no dangerous workflow patterns detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#dangerous-workflow"
},
{
"name": "Dependency-Update-Tool",
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"reason": "no update tool detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#dependency-update-tool"
},
{
"name": "Fuzzing",
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"reason": "project is not fuzzed",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#fuzzing"
},
{
"name": "License",
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"reason": "license file detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#license"
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{
"name": "Maintained",
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},
{
"name": "Packaging",
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"reason": "packaging workflow not detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#packaging"
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{
"name": "Pinned-Dependencies",
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{
"name": "SAST",
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"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#sast"
},
{
"name": "Security-Policy",
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"reason": "security policy file not detected",
"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#security-policy"
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{
"name": "Signed-Releases",
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{
"name": "Token-Permissions",
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"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#token-permissions"
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{
"name": "Vulnerabilities",
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"documentation_url": "https://github.com/ossf/scorecard/blob/c395761df6afe1a69e476bc60a013a94bcbc153f/docs/checks.md#vulnerabilities"
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],
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"has_dependabot_config": false
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},
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"disabled_categories": [],
"disabled_components": {}
},
"source": {
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"host": "github.com",
"name": "fearless_simd",
"owner": "linebender"
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"key": "overall",
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"note": null,
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"community": 65,
"governance": 81,
"engineering": 53
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"components": []
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"categories": [
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"key": "vitality",
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"weight": 0.22,
"metrics": [
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"key": "development_activity",
"band": "excellent",
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"note": null,
"notes": [],
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"inputs": {
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"components": [
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"status": "partial",
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"code": "commit_cadence_weeks",
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{
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"key": "openssf_scorecard_maintained",
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]
},
{
"key": "release_discipline",
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},
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"code": "weights_renormalized",
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"components": [
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],
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{
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{
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],
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]
},
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"key": "abandonment",
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],
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"metrics": [
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"key": "popularity",
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"notes": [],
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"components": [
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"key": "stars",
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"details": [
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],
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{
"key": "forks",
"name": "Forks",
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"points": 11.5,
"status": "partial",
"details": [
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"code": "forks",
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}
],
"max_points": 25
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{
"key": "watchers",
"name": "Watchers",
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"points": 6.5,
"status": "partial",
"details": [
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"code": "watchers",
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}
],
"max_points": 15
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]
},
{
"key": "community_health",
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"name": "Community health",
"note": null,
"notes": [],
"value": 50,
"inputs": {
"has_readme": true,
"has_license": true,
"has_contributing": false,
"has_issue_template": false,
"has_code_of_conduct": false,
"has_pull_request_template": false
},
"components": [
{
"key": "readme",
"name": "README",
"detail": null,
"points": 22.5,
"status": "met",
"details": [],
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},
{
"key": "license",
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"detail": "recognized license (Apache-2.0)",
"points": 22.5,
"status": "met",
"details": [
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"code": "license_standard",
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{
"code": "license_spdx",
"params": {
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{
"key": "contributing_guide",
"name": "CONTRIBUTING guide",
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"points": 0,
"status": "missed",
"details": [],
"max_points": 18
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{
"key": "code_of_conduct",
"name": "Code of conduct",
"detail": null,
"points": 0,
"status": "missed",
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{
"key": "issue_template",
"name": "Issue template",
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"points": 0,
"status": "missed",
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{
"key": "pr_template",
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"status": "missed",
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]
},
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"key": "ecosystem_adoption",
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"notes": [
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"code": "excluded_no_data",
"params": {
"components": [
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},
{
"code": "weights_renormalized",
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],
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"inputs": {
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"dependents": null,
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"components": [
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"key": "monthly_downloads",
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"status": "partial",
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"code": "downloads_monthly",
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}
],
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{
"key": "registry_dependents",
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"status": "excluded",
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"code": "not_reported_by_this_ecosystem",
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"key": "bus_factor",
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{
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"code": "top_contributor_share",
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{
"key": "openssf_scorecard_contributors",
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]
},
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"key": "responsiveness",
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"components": [
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{
"key": "pr_acceptance",
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"key": "openssf_scorecard_code_review",
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]
},
{
"key": "stewardship",
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"components": [
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"code": "owner_organization",
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],
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{
"key": "verified_domain",
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"points": 0,
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{
"key": "owner_reach",
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"code": "owner_followers",
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{
"key": "track_record",
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"points": 23.7,
"status": "partial",
"details": [
{
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},
{
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},
{
"key": "package_maintenance",
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"note": null,
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"components": [
{
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{
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{
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{
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],
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},
{
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"details": [
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"code": "ci_workflows",
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{
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},
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{
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{
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"points": 0,
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{
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{
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{
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{
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{
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"points": 7.5,
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{
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{
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{
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{
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"points": 0,
"status": "missed",
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{
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],
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{
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{
"key": "vulnerabilities",
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]
},
{
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"notes": [
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{
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"components": [
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"points": 35,
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{
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{
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{
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"notes": [],
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"inputs": {
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{
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"components": [
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{
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{
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"notes": [],
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"inputs": {
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{
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